From patchwork Wed Apr 23 17:36:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 28932 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ve0-f197.google.com (mail-ve0-f197.google.com [209.85.128.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 38E68203AC for ; Wed, 23 Apr 2014 17:36:41 +0000 (UTC) Received: by mail-ve0-f197.google.com with SMTP id pa12sf4930587veb.4 for ; Wed, 23 Apr 2014 10:36:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe:content-type; bh=+xHyZktH3Dv6sJ3oX5lDxQyQuhpmXDJ/YRGnxcI6XlE=; b=i2u2TyFTK5Ul7dWsiJwKJo96F2yXcUCahGxgStz6uP3rHjqzjfvmT7yZxbGd7aDDbX S+8ILajqRatpM0sykxFU6MO55rX6yckI/b/wnY3wc146BDnWu60Kz6BAcWaCWZoQfexU Pb1QPIOm1STzeHdfs+oM3ohMNBl5miKHCp+veUDvga5jrmiOUfqX9b10a+Cxd6nEySZT KpwM0D0ZsyQnnMrdiwI1rJch8Lv1RKA1SuH0BiVMp2P/NGER+7dSYaaojrjGw+jM1EP4 EWsznMuXDMpvGhJtGv0K44KrU820Q+MlWRQi9bdMV7de6Vz6nhysIZCLe2oqn2fHoxg4 qtkA== X-Gm-Message-State: ALoCoQmd5V9uLfYhaskJfy3t1SlePz/B+LiwNb4FyoUsfRkUJ7/5ID57u70o0mxHT8jv13wLz+sH X-Received: by 10.236.137.50 with SMTP id x38mr26010199yhi.9.1398274600908; Wed, 23 Apr 2014 10:36:40 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.21.40 with SMTP id 37ls667015qgk.32.gmail; Wed, 23 Apr 2014 10:36:40 -0700 (PDT) X-Received: by 10.58.49.65 with SMTP id s1mr797403ven.48.1398274600747; Wed, 23 Apr 2014 10:36:40 -0700 (PDT) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by mx.google.com with ESMTPS id kj3si307673vdb.168.2014.04.23.10.36.40 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 23 Apr 2014 10:36:40 -0700 (PDT) Received-SPF: none (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) client-ip=209.85.128.176; Received: by mail-ve0-f176.google.com with SMTP id db11so1535919veb.35 for ; Wed, 23 Apr 2014 10:36:40 -0700 (PDT) X-Received: by 10.52.130.225 with SMTP id oh1mr36482041vdb.8.1398274600661; Wed, 23 Apr 2014 10:36:40 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp121234vcb; Wed, 23 Apr 2014 10:36:40 -0700 (PDT) X-Received: by 10.68.138.227 with SMTP id qt3mr58068269pbb.6.1398274599790; Wed, 23 Apr 2014 10:36:39 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id qi8si1027656pbc.231.2014.04.23.10.36.39; Wed, 23 Apr 2014 10:36:39 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751681AbaDWRg2 (ORCPT + 27 others); Wed, 23 Apr 2014 13:36:28 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:41893 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161002AbaDWRgX (ORCPT ); Wed, 23 Apr 2014 13:36:23 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s3NHaJP7002427; Wed, 23 Apr 2014 12:36:19 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3NHaJ2N025130; Wed, 23 Apr 2014 12:36:19 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Wed, 23 Apr 2014 12:36:19 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3NHaGUe031511; Wed, 23 Apr 2014 12:36:16 -0500 From: Roger Quadros To: CC: , , , , , , , , Benoit Cousson , Roger Quadros Subject: [PATCH v4 4/4] ARM: dts: dra7: add OCP2SCP3 and SATA nodes Date: Wed, 23 Apr 2014 20:36:15 +0300 Message-ID: <1398274575-24818-1-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1398274237-24510-1-git-send-email-rogerq@ti.com> References: <1398274237-24510-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Balaji T K Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY. [Roger Q] Clean up. CC: Benoit Cousson Signed-off-by: Balaji T K Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra7.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 1c0f8e1..084f42e 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -789,6 +789,45 @@ dma-names = "tx0", "rx0"; status = "disabled"; }; + + omap_control_sata: control-phy@4a002374 { + compatible = "ti,control-phy-pipe3"; + reg = <0x4a002374 0x4>; + reg-names = "power"; + clocks = <&sys_clkin1>; + clock-names = "sysclk"; + }; + + /* OCP2SCP3 */ + ocp2scp@4a090000 { + compatible = "ti,omap-ocp2scp"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0x4a090000 0x20>; + ti,hwmods = "ocp2scp3"; + sata_phy: phy@4A096000 { + compatible = "ti,phy-pipe3-sata"; + reg = <0x4A096000 0x80>, /* phy_rx */ + <0x4A096400 0x64>, /* phy_tx */ + <0x4A096800 0x40>; /* pll_ctrl */ + reg-names = "phy_rx", "phy_tx", "pll_ctrl"; + ctrl-module = <&omap_control_sata>; + clocks = <&sys_clkin1>; + clock-names = "sysclk"; + #phy-cells = <0>; + }; + }; + + sata: sata@4a141100 { + compatible = "snps,dwc-ahci"; + reg = <0x4a140000 0x1100>, <0x4a141100 0x7>; + interrupts = ; + phys = <&sata_phy>; + phy-names = "sata-phy"; + clocks = <&sata_ref_clk>; + ti,hwmods = "sata"; + }; }; };