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[209.132.180.67]) by mx.google.com with ESMTP id uu10si5973067pac.36.2014.04.29.13.20.31; Tue, 29 Apr 2014 13:20:31 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758385AbaD2UUb (ORCPT + 9 others); Tue, 29 Apr 2014 16:20:31 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:44070 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758342AbaD2UUa (ORCPT ); Tue, 29 Apr 2014 16:20:30 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s3TKJut0010923; Tue, 29 Apr 2014 15:19:56 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3TKJuvo024465; Tue, 29 Apr 2014 15:19:56 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Tue, 29 Apr 2014 15:19:56 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3TKJuZf030784; Tue, 29 Apr 2014 15:19:56 -0500 Received: from localhost (j-172-22-136-12.vpn.ti.com [172.22.136.12]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s3TKJut25407; Tue, 29 Apr 2014 15:19:56 -0500 (CDT) From: Dan Murphy To: , , , CC: , , , Dan Murphy Subject: [RFC 07/11] ARM: TI: Describe the ti reset DT entries Date: Tue, 29 Apr 2014 15:19:46 -0500 Message-ID: <1398802790-29287-8-git-send-email-dmurphy@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398802790-29287-1-git-send-email-dmurphy@ti.com> References: <1398802790-29287-1-git-send-email-dmurphy@ti.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: dmurphy@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Describe the TI reset DT entries for TI SoC's. Signed-off-by: Dan Murphy --- .../devicetree/bindings/reset/ti,reset.txt | 34 ++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/ti,reset.txt diff --git a/Documentation/devicetree/bindings/reset/ti,reset.txt b/Documentation/devicetree/bindings/reset/ti,reset.txt new file mode 100644 index 0000000..19f5603 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/ti,reset.txt @@ -0,0 +1,34 @@ +Texas Instruments Reset Controller +====================================== +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +Specifying the reset entries for the IP module +============================================== +Parent module: +This is the module node that contains the reset registers and bits. + +example: + prcm_resets: resets { + compatible = "ti,dra7-resets"; + #reset-cells = <1>; + }; + +Required Properties: +compatible - Should be "ti--resets + +DRA7xx: +Compatible - ti,dra7-resets +Reset indices - include/dt-bindings/reset/ti,dra7-resets.h + +OMAP5: +Compatible - ti,omap5-resets +Reset indices - include/dt-bindings/reset/ti,omap5-resets.h + +AM33xx: +Compatible - ti-am335x-resets +Reset indices - include/dt-bindings/reset/ti,am33xx-resets.h + +AM43xx: +Compatible - ti,am4372-resets +Reset indices - include/dt-bindings/reset/ti,am437x-resets.h