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[209.132.180.67]) by mx.google.com with ESMTP id ou3si18845730pbb.11.2015.09.24.07.27.38; Thu, 24 Sep 2015 07:27:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752839AbbIXO1i (ORCPT + 5 others); Thu, 24 Sep 2015 10:27:38 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:60745 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752751AbbIXO1g (ORCPT ); Thu, 24 Sep 2015 10:27:36 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t8OERAXR008650; Thu, 24 Sep 2015 09:27:10 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8OERAHw012592; Thu, 24 Sep 2015 09:27:10 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Thu, 24 Sep 2015 09:27:10 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8OEQjRZ012528; Thu, 24 Sep 2015 09:27:08 -0500 From: Tero Kristo To: , , , CC: Subject: [PATCH 10/17] ARM: OMAP2+: hwmod: parse reset information from DT Date: Thu, 24 Sep 2015 17:26:51 +0300 Message-ID: <1443104818-993-11-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1443104818-993-1-git-send-email-t-kristo@ti.com> References: <1443104818-993-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.49 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , DT can now be used to provide reset information, so parse this to avoid the need to have reset info under hwmod data. This patch disables the support for existing reset data under hwmod data, so shall be applied only after the DT reset conversion. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/omap_hwmod.c | 104 +++++++++++++++++++++++++++++++++++++- arch/arm/mach-omap2/omap_hwmod.h | 8 +-- 2 files changed, 107 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index f53ebc6..974260a 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -142,6 +142,7 @@ #include #include #include +#include #include @@ -1611,9 +1612,10 @@ static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, if (!strcmp(rst_line, name)) { ohri->rst_shift = oh->rst_lines[i].rst_shift; ohri->st_shift = oh->rst_lines[i].st_shift; - pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", + ohri->rc = oh->rst_lines[i].rc; + pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d rc %x\n", oh->name, __func__, rst_line, ohri->rst_shift, - ohri->st_shift); + ohri->st_shift, (u32)ohri->rc); return 0; } @@ -2445,6 +2447,58 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, } /** + * _init_resets - initialize internal reset data for hwmod @oh + * @oh: struct omap_hwmod * + * @np: device node pointer for this hwmod + * + * Look up the reset info for this hwmod from device tree. + */ +static int __init _init_resets(struct omap_hwmod *oh, struct device_node *np) +{ + int num; + int i; + int ret; + const char *reset_name; + struct reset_control *rc; + + num = of_property_count_strings(np, "reset-names"); + if (num < 1) + return 0; + + oh->rst_lines = kcalloc(num, sizeof(struct omap_hwmod_rst_info), + GFP_KERNEL); + + for (i = 0; i < num; i++) { + ret = of_property_read_string_index(np, "reset-names", i, + &reset_name); + if (ret) + goto cleanup; + + rc = of_reset_control_get(np, reset_name); + if (IS_ERR(rc)) { + ret = PTR_ERR(rc); + goto cleanup; + } + + oh->rst_lines[i].name = kstrdup(reset_name, GFP_KERNEL); + oh->rst_lines[i].rc = rc; + } + + oh->rst_lines_cnt = num; + + return ret; + +cleanup: + for (i = 0; i < num; i++) { + if (oh->rst_lines[i].rc) + reset_control_put(oh->rst_lines[i].rc); + } + kfree(oh->rst_lines); + oh->rst_lines = NULL; + return ret; +} + +/** * _init - initialize internal data for the hwmod @oh * @oh: struct omap_hwmod * * @n: (unused) @@ -2507,6 +2561,13 @@ static int __init _init(struct omap_hwmod *oh, void *data) oh->flags |= HWMOD_INIT_NO_RESET; if (of_find_property(np, "ti,no-idle-on-init", NULL)) oh->flags |= HWMOD_INIT_NO_IDLE; + + r = _init_resets(oh, np); + if (r < 0) { + WARN(1, "omap_hwmod: %s: couldn't init reset\n", + oh->name); + return -EINVAL; + } } oh->_state = _HWMOD_STATE_INITIALIZED; @@ -3108,6 +3169,39 @@ static int _am33xx_deassert_hardreset(struct omap_hwmod *oh, oh->prcm.omap4.rstst_offs); } +static int _dt_assert_hardreset(struct omap_hwmod *oh, + struct omap_hwmod_rst_info *ohri) +{ + if (!ohri->rc) { + pr_err("%s: %s: missing rc\n", __func__, oh->name); + WARN_ONCE(1, "missing rc\n"); + return 0; + } + + return reset_control_assert(ohri->rc); +} + +static int _dt_deassert_hardreset(struct omap_hwmod *oh, + struct omap_hwmod_rst_info *ohri) +{ + if (!ohri->rc) { + pr_err("%s: %s: missing rc\n", __func__, oh->name); + return 0; + } + + return reset_control_deassert(ohri->rc); +} + +static int _dt_is_hardreset_asserted(struct omap_hwmod *oh, + struct omap_hwmod_rst_info *ohri) +{ + if (!ohri->rc) { + pr_err("%s: %s: missing rc\n", __func__, oh->name); + return 0; + } + return reset_control_status(ohri->rc); +} + /* Public functions */ u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) @@ -3922,6 +4016,12 @@ void __init omap_hwmod_init(void) WARN(1, "omap_hwmod: unknown SoC type\n"); } + if (of_have_populated_dt()) { + soc_ops.assert_hardreset = _dt_assert_hardreset; + soc_ops.deassert_hardreset = _dt_deassert_hardreset; + soc_ops.is_hardreset_asserted = _dt_is_hardreset_asserted; + } + inited = true; } diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index ca6df1a..a6f3ac2 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -199,14 +199,16 @@ struct omap_hwmod_dma_info { * @name: name of the reset line (module local name) * @rst_shift: Offset of the reset bit * @st_shift: Offset of the reset status bit (OMAP2/3 only) + * @rc: reset control handle for the reset * * @name should be something short, e.g., "cpu0" or "rst". It is defined * locally to the hwmod. */ struct omap_hwmod_rst_info { - const char *name; - u8 rst_shift; - u8 st_shift; + const char *name; + u8 rst_shift; + u8 st_shift; + struct reset_control *rc; }; /**