From patchwork Wed Jun 1 17:35:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 69053 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp221288qge; Wed, 1 Jun 2016 10:36:08 -0700 (PDT) X-Received: by 10.157.31.36 with SMTP id x33mr3785149otd.26.1464802568476; Wed, 01 Jun 2016 10:36:08 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id uk2si18992632pab.226.2016.06.01.10.36.08; Wed, 01 Jun 2016 10:36:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932688AbcFARgH (ORCPT + 3 others); Wed, 1 Jun 2016 13:36:07 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:35350 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932668AbcFARgH (ORCPT ); Wed, 1 Jun 2016 13:36:07 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u51HZbh1004194; Wed, 1 Jun 2016 12:35:37 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u51HZgXE025489; Wed, 1 Jun 2016 12:35:42 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Wed, 1 Jun 2016 12:35:41 -0500 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u51HZWhn014946; Wed, 1 Jun 2016 12:35:40 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 4/5] ARM: dts: omap5: add fref_xtal_ck support Date: Wed, 1 Jun 2016 20:35:25 +0300 Message-ID: <1464802526-16372-5-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464802526-16372-1-git-send-email-t-kristo@ti.com> References: <1464802526-16372-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The clock is directly sourced from sys_clkin, and provides an external output clock for (typically) TWL6040 chip. Signed-off-by: Tero Kristo --- arch/arm/boot/dts/omap54xx-clocks.dtsi | 10 ++++++++++ drivers/clk/ti/clk-54xx.c | 1 + 2 files changed, 11 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi index 4899c23..a8153b4 100644 --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi @@ -1388,3 +1388,13 @@ reg = <0x021c>; }; }; + +&scm_wkup_pad_conf_clocks { + fref_xtal_ck: fref_xtal_ck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&sys_clkin>; + ti,bit-shift = <28>; + reg = <0x14>; + }; +}; diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c index 294bc03..20f6985 100644 --- a/drivers/clk/ti/clk-54xx.c +++ b/drivers/clk/ti/clk-54xx.c @@ -222,6 +222,7 @@ static struct ti_dt_clk omap54xx_clks[] = { DT_CLK("4013a000.timer", "timer_sys_ck", "dss_syc_gfclk_div"), DT_CLK("4013c000.timer", "timer_sys_ck", "dss_syc_gfclk_div"), DT_CLK("4013e000.timer", "timer_sys_ck", "dss_syc_gfclk_div"), + DT_CLK(NULL, "fref_xtal_ck", "fref_xtal_ck"), { .node_name = NULL }, };