From patchwork Tue Mar 7 13:04:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 660349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3E2CC6FA99 for ; Tue, 7 Mar 2023 13:05:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230034AbjCGNFc (ORCPT ); Tue, 7 Mar 2023 08:05:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229954AbjCGNFR (ORCPT ); Tue, 7 Mar 2023 08:05:17 -0500 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0438DA5EA for ; Tue, 7 Mar 2023 05:04:52 -0800 (PST) Received: by mail-lf1-x131.google.com with SMTP id j11so16902328lfg.13 for ; Tue, 07 Mar 2023 05:04:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678194286; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=t+KEmI8whzjEUAizVJPshJjrICLTLWn62dQQiYVD1jA=; b=ivIOKdjXJOAGhCprjPgOdvonPXMyFzqBR0VHl+PrzMbdmTRzJIvMQr3bkAKB8TUTt6 VJkVZq/cX3c6mxFLVPYwZAbo9fHd4WpwZzvU/jNVSjyBXMIhIPbqSgXfzP7vMc0r3IR0 Wze9ZWsbA0eXNu8gx6u40bSLeg5OM8NxSflVtn2+EDdVG/3Wunq+WQjvhK9CH/ut8iLl DLShDAZeZ1gnYiYq/GR88Ag/QBSlaM7NT/KJyuCN6pY2cnBGW5+eHQuoRzhxX0DOuR2F G/FF/Mhd6tyK9fPpwgYzbzj6MdPtz4hrae/mLZ4JX1+vbjzHzVUoiz/mT6tFPlV/3/CK s6Fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678194286; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t+KEmI8whzjEUAizVJPshJjrICLTLWn62dQQiYVD1jA=; b=h73mEmCIsM67Tr4k7JqWSWeegfNWpdfROaZNB1mKyFe69wH+RgNMhXEUrXY8wLBVVS Osj5tLMhtShGEjO65wHrIb5pOCZqtxJQH48HRVCcTS4cVfdY7wdLgnSiRdqIZ3YRvlii emRdoyHM558P+Ab/zg/jbDi5vz4bMvpeYRto8V4h6R1Xa279mUDxPuW7VbaUiMPoGtla 5c3fZlNWi9LSMFnhXDzh7KBDwZQTD+LyDa0bRmA7XGt7L6lkn7alieqlzawN1RGOmo4S aS6I9ZFni1zOjO8xsrV/2t5UvWYDC7M5hjkQlCrKNxhQnKTrqsKpmCdSqSg/uf6Ni0AH FuVw== X-Gm-Message-State: AO0yUKVTsLC1cCy8bqbJbTiqdlk9HJVUxCoXmGS49UUtQ/tfxOSDkVkf LYZIJg2HbPXM7uN7vEBtXWzBa8JXOLCfDzbRXIU= X-Google-Smtp-Source: AK7set8VxHEGYGpsZW0/selFSXoV2TQysp2TeyhwgH4Mz1Y9cEa/yyGjc+FFad13OmFBaxNGKoDrUw== X-Received: by 2002:ac2:5504:0:b0:4e1:d90:e754 with SMTP id j4-20020ac25504000000b004e10d90e754mr4113951lfk.7.1678194286233; Tue, 07 Mar 2023 05:04:46 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id w14-20020ac2598e000000b004caf992bba9sm2030548lfn.268.2023.03.07.05.04.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Mar 2023 05:04:45 -0800 (PST) From: Linus Walleij Date: Tue, 07 Mar 2023 14:04:43 +0100 Subject: [PATCH v2 01/16] gpio: altera: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230215-immutable-chips-v2-1-d6b0e3f2d991@linaro.org> References: <20230215-immutable-chips-v2-0-d6b0e3f2d991@linaro.org> In-Reply-To: <20230215-immutable-chips-v2-0-d6b0e3f2d991@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Acked-by: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/gpio/gpio-altera.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c index b59fae993626..c1599edb3453 100644 --- a/drivers/gpio/gpio-altera.c +++ b/drivers/gpio/gpio-altera.c @@ -24,14 +24,12 @@ * @interrupt_trigger : specifies the hardware configured IRQ trigger type * (rising, falling, both, high) * @mapped_irq : kernel mapped irq number. -* @irq_chip : IRQ chip configuration */ struct altera_gpio_chip { struct of_mm_gpio_chip mmchip; raw_spinlock_t gpio_lock; int interrupt_trigger; int mapped_irq; - struct irq_chip irq_chip; }; static void altera_gpio_irq_unmask(struct irq_data *d) @@ -43,6 +41,7 @@ static void altera_gpio_irq_unmask(struct irq_data *d) altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d)); mm_gc = &altera_gc->mmchip; + gpiochip_enable_irq(&mm_gc->gc, irqd_to_hwirq(d)); raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags); intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); @@ -68,6 +67,7 @@ static void altera_gpio_irq_mask(struct irq_data *d) intmask &= ~BIT(irqd_to_hwirq(d)); writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags); + gpiochip_disable_irq(&mm_gc->gc, irqd_to_hwirq(d)); } /* @@ -233,6 +233,17 @@ static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc) chained_irq_exit(chip, desc); } +static const struct irq_chip altera_gpio_irq_chip = { + .name = "altera-gpio", + .irq_mask = altera_gpio_irq_mask, + .irq_unmask = altera_gpio_irq_unmask, + .irq_set_type = altera_gpio_irq_set_type, + .irq_startup = altera_gpio_irq_startup, + .irq_shutdown = altera_gpio_irq_mask, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int altera_gpio_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; @@ -278,15 +289,9 @@ static int altera_gpio_probe(struct platform_device *pdev) } altera_gc->interrupt_trigger = reg; - altera_gc->irq_chip.name = "altera-gpio"; - altera_gc->irq_chip.irq_mask = altera_gpio_irq_mask; - altera_gc->irq_chip.irq_unmask = altera_gpio_irq_unmask; - altera_gc->irq_chip.irq_set_type = altera_gpio_irq_set_type; - altera_gc->irq_chip.irq_startup = altera_gpio_irq_startup; - altera_gc->irq_chip.irq_shutdown = altera_gpio_irq_mask; - girq = &altera_gc->mmchip.gc.irq; - girq->chip = &altera_gc->irq_chip; + gpio_irq_chip_set_chip(girq, &altera_gpio_irq_chip); + if (altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH) girq->parent_handler = altera_gpio_irq_leveL_high_handler; else