From patchwork Mon Jan 8 18:33:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 761642 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A529455C09; Mon, 8 Jan 2024 18:33:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="lbQcTlLh" Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 408IXEMq010030; Mon, 8 Jan 2024 12:33:14 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1704738794; bh=PWj0D2WMvRJ11gnfwf0SZ44vgMNZaHz/OZM54jmoFVs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lbQcTlLhFLWFWfmynTQ/fLKR5FgIXclptYPQDZ4h6j0pXsN23aLT3bKn3EpSGT1Eh Jy9RaM4+e4Iu3nU9Ph6+pRhRmjuvcL72wjNo7fHO6mq3m09p5cboGlbYWH3QUd5XrV /mOGPr4d+1qObwgPtZ3iRdVNRkimiTeKpXE7KTww= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 408IXEak124040 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 8 Jan 2024 12:33:14 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 8 Jan 2024 12:33:14 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 8 Jan 2024 12:33:14 -0600 Received: from lelvsmtp5.itg.ti.com ([10.249.40.136]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 408IX3hK051691; Mon, 8 Jan 2024 12:33:13 -0600 From: Andrew Davis To: Frank Binns , Donald Robson , Matt Coster , "H . Nikolaus Schaller" , Adam Ford , Ivaylo Dimitrov , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?utf-8?q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Paul Cercueil CC: , , , , , , , Andrew Davis Subject: [PATCH RFC v2 11/11] MIPS: DTS: jz4780: Add device tree entry for SGX GPU Date: Mon, 8 Jan 2024 12:33:02 -0600 Message-ID: <20240108183302.255055-12-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240108183302.255055-1-afd@ti.com> References: <20240108183302.255055-1-afd@ti.com> Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Add SGX GPU device entry to base jz4780 dtsi file. Signed-off-by: Andrew Davis --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index 18affff85ce38..5ea6833f5e872 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -460,6 +460,17 @@ hdmi: hdmi@10180000 { status = "disabled"; }; + gpu: gpu@13040000 { + compatible = "ingenic,jz4780-gpu", "img,powervr-sgx540"; + reg = <0x13040000 0x4000>; + + clocks = <&cgu JZ4780_CLK_GPU>; + clock-names = "core"; + + interrupt-parent = <&intc>; + interrupts = <63>; + }; + lcdc0: lcdc0@13050000 { compatible = "ingenic,jz4780-lcd"; reg = <0x13050000 0x1800>;