From patchwork Tue Jun 6 10:56:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason Huo X-Patchwork-Id: 690791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C15D7C77B7A for ; Tue, 6 Jun 2023 10:58:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235977AbjFFK6J convert rfc822-to-8bit (ORCPT ); Tue, 6 Jun 2023 06:58:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235908AbjFFK5Q (ORCPT ); Tue, 6 Jun 2023 06:57:16 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5868E5D; Tue, 6 Jun 2023 03:57:00 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id DCC6B80B6; Tue, 6 Jun 2023 18:56:57 +0800 (CST) Received: from EXMBX067.cuchost.com (172.16.6.67) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 6 Jun 2023 18:56:58 +0800 Received: from localhost.localdomain (183.27.98.75) by EXMBX067.cuchost.com (172.16.6.67) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 6 Jun 2023 18:56:56 +0800 From: Mason Huo To: "Rafael J. Wysocki" , Viresh Kumar , Emil Renner Berthing , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley , "Paul Walmsley" , Palmer Dabbelt , Albert Ou CC: Shengyu Qu , , , , , Mason Huo Subject: [PATCH v4 0/3] Add JH7110 cpufreq support Date: Tue, 6 Jun 2023 18:56:53 +0800 Message-ID: <20230606105656.124355-1-mason.huo@starfivetech.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Originating-IP: [183.27.98.75] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX067.cuchost.com (172.16.6.67) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The StarFive JH7110 SoC has four RISC-V cores, and it supports up to 4 cpu frequency loads. This patchset adds the compatible strings into the allowlist for supporting the generic cpufreq driver on JH7110 SoC. Also, it enables the axp15060 pmic for the cpu power source. The series has been tested on the VisionFive 2 boards which are equipped with JH7110 SoC and axp15060 pmic. --- This patchset is based on v6.4-rc4 with these patches applied: [1] ("regulator: Add X-Powers AXP15060/AXP313a PMIC support") https://lore.kernel.org/lkml/20230524000012.15028-1-andre.przywara@arm.com/ Changes since v3: - Fix the dtb_check issues for axp15060 pmic dts configuration. Changes since v2: - Fix the new blank line at EOF issue in dtsi. Changes since v1: - Fix dts node naming issues. - Move clock properties of cpu node from .dtsi to .dtsi. - Follow the alphabetical order to place the cpufreq dt allowlist. Mason Huo (3): riscv: dts: starfive: Enable axp15060 pmic for cpufreq cpufreq: dt-platdev: Add JH7110 SOC to the allowlist riscv: dts: starfive: Add cpu scaling for JH7110 SoC .../jh7110-starfive-visionfive-2.dtsi | 33 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 33 +++++++++++++++++++ drivers/cpufreq/cpufreq-dt-platdev.c | 2 ++ 3 files changed, 68 insertions(+)