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Fri, 1 Sep 2023 09:41:28 -0700 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Fri, 1 Sep 2023 09:41:28 -0700 Received: from sumitg-l4t.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.37 via Frontend Transport; Fri, 1 Sep 2023 09:41:25 -0700 From: Sumit Gupta To: , , , , CC: , , , , Subject: [Patch v2 0/2] Improvements to the Tegra CPUFREQ driver Date: Fri, 1 Sep 2023 22:11:11 +0530 Message-ID: <20230901164113.29139-1-sumitg@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003440:EE_|SJ2PR12MB9241:EE_ X-MS-Office365-Filtering-Correlation-Id: 69ebeaa2-6734-4fb6-a665-08dbab0a4aa6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2023 16:41:29.2109 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 69ebeaa2-6734-4fb6-a665-08dbab0a4aa6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003440.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9241 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This patch set adds below improvements to the Tegra194 CPUFREQ driver. They are applicable to all the Tegra SoC's supported by the driver. 1) Patch 1: Avoid making SMP call on every frequency request to reduce the time for frequency set and get calls. 2) Patch 2: Use reference clock count based loop instead of udelay() to improve the accuracy of re-generated CPU frequency. The patches are not related but have minor conflict. So, need to be applied in order of patch numbers. If 'Patch 2' is to be applied first then will rebase that and send separately. Sumit Gupta (2): cpufreq: tegra194: save CPU data to avoid repeated SMP calls cpufreq: tegra194: use refclk delta based loop instead of udelay drivers/cpufreq/tegra194-cpufreq.c | 151 ++++++++++++++++++++--------- 1 file changed, 106 insertions(+), 45 deletions(-)