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Wed, 25 Jan 2017 11:56:02 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Chanwoo Choi , Inki Dae Subject: [PATCH 8/8] arm64: dts: exynos: Add remaining power domains to Exynos5433 SoC Date: Wed, 25 Jan 2017 12:55:42 +0100 Message-id: <1485345342-3273-9-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1485345342-3273-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrEIsWRmVeSWpSXmKPExsWy7djP87rBkzoiDG4tZLbYOGM9q8X1L89Z LSbdn8Bicf78BnaLz71HGC1mnN/HZLH2yF12i8Nv2lkdODw2repk8+jbsorR4/MmuQDmKC6b lNSczLLUIn27BK6M75f/shSclKw4cP8fSwNjt0gXIyeHhICJxN8Tq9kgbDGJC/fWA9lcHEIC Sxkl7q+7xgzhfGaUmLnuDDtMR+f8DlaIxDJGicVLTjBCOA1MEu2fToJVsQkYSnS97QKbKyJg L3H7yTJ2kCJmgTYmiV232oDaOTiEBSIkus4YgNSwCKhKTHrVDdbLK+AucfjvTxaIbXISJ49N ZgWxOQU8JLqe9jNBxF+zSSzaVQQyRkJAVmLTAWaIsIvE5esboQ4Vlnh1fAuULSNxeXI31Mh+ RommVm0IewajxLm3vBC2tcTh4xfBVjEL8ElM2jadGWI8r0RHmxCE6SHRei0UotpR4tK2b9DA ms0o8fh4N/sERpkFjAyrGEVSS4tz01OLjfWKE3OLS/PS9ZLzczcxAmP29L/jn3Ywfj1hdYhR gINRiYf3RUp7hBBrYllxZe4hRgkOZiUR3iUTOyKEeFMSK6tSi/Lji0pzUosPMUpzsCiJ8+5Z cCVcSCA9sSQ1OzW1ILUIJsvEwSnVwMjqZXu2PJBV4mFHSsKpWc9klXcWCzGX6H+5Wc3v+uGF UpbHtniVYpu5h6OTVx39tn5q9d7JJfEaj2stnm8UOLcifsqNr4suXHylYrK37MJiphbXJ/Wv gjIncnB8jE7P5rzDbtG0Ve3pgWfnkhmjX3x78Le53e/ri/ZdESc/2k6+qK1a0c7kE6nEUpyR aKjFXFScCAARyKfh1QIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCLMWRmVeSWpSXmKPExsVy+t/xK7r+kzoiDJ6/VbHYOGM9q8X1L89Z LSbdn8Bicf78BnaLz71HGC1mnN/HZLH2yF12i8Nv2lkdODw2repk8+jbsorR4/MmuQDmKDeb jNTElNQihdS85PyUzLx0W6XQEDddCyWFvMTcVFulCF3fkCAlhbLEnFIgz8gADTg4B7gHK+nb JbhlfL/8l6XgpGTFgfv/WBoYu0W6GDk5JARMJDrnd7BC2GISF+6tZ+ti5OIQEljCKLFr2yFW CKeJSeJDw0cWkCo2AUOJrrddbCC2iIC9xO0ny9hBipgFOpgk/t1pAUpwcAgLREh0nTEAqWER UJWY9KqbHcTmFXCXOPz3JwvENjmJk8cmg23mFPCQ6HrazwRiCwHVTL25lmUCI+8CRoZVjCKp pcW56bnFRnrFibnFpXnpesn5uZsYgSG87djPLTsYu94FH2IU4GBU4uGdkNQeIcSaWFZcmXuI UYKDWUmE16GlI0KINyWxsiq1KD++qDQntfgQoynQUROZpUST84HxlVcSb2hiaG5paGRsYWFu ZKQkzjv1w5VwIYH0xJLU7NTUgtQimD4mDk6pBsYFNjwxVRdYGcSX8581EfKy3vxs5lPJXCWf t1x+fn9uT2Pcxhm2tjJEaqGk9p1G/txV9dkadabdXcLKLHec9q9T43jp7tmv23led9v7pbPc S6veTH+nWbpwsdk1Vy3V6/8v/U1qsLsl0Go5z/bU+pIY1cq3bzZ9NeRpl/hope+5UmqLDzdj mRJLcUaioRZzUXEiAJVMJ2N3AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170125115602eucas1p13feedded6c2e7efc7ff621141ef5e4c1 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170125115602eucas1p13feedded6c2e7efc7ff621141ef5e4c1 X-RootMTR: 20170125115602eucas1p13feedded6c2e7efc7ff621141ef5e4c1 References: <1485345342-3273-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This patch adds support for G2D, G3D, CAM0, CAM1, ISP, HVEC power domains to Exynos5433 SoCs. Currently only clock controllers for those domains are defined. CAM1 is a parent of CAM0 power domain and CAM0 is a parent of ISP power domain. Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 44 ++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-pm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 0e18e9aeb4ce..e45f6e4683b3 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -344,6 +344,7 @@ clocks = <&xxti>, <&cmu_top CLK_ACLK_G2D_266>, <&cmu_top CLK_ACLK_G2D_400>; + power-domains = <&pd_g2d>; }; cmu_disp: clock-controller@13b90000 { @@ -415,6 +416,7 @@ clock-names = "oscclk", "aclk_g3d_400"; clocks = <&xxti>, <&cmu_top CLK_ACLK_G3D_400>; + power-domains = <&pd_g3d>; }; cmu_gscl: clock-controller@13cf0000 { @@ -480,6 +482,7 @@ clock-names = "oscclk", "aclk_hevc_400"; clocks = <&xxti>, <&cmu_top CLK_ACLK_HEVC_400>; + power-domains = <&pd_hevc>; }; cmu_isp: clock-controller@146d0000 { @@ -493,6 +496,7 @@ clocks = <&xxti>, <&cmu_top CLK_ACLK_ISP_DIS_400>, <&cmu_top CLK_ACLK_ISP_400>; + power-domains = <&pd_isp>; }; cmu_cam0: clock-controller@120d0000 { @@ -508,6 +512,7 @@ <&cmu_top CLK_ACLK_CAM0_333>, <&cmu_top CLK_ACLK_CAM0_400>, <&cmu_top CLK_ACLK_CAM0_552>; + power-domains = <&pd_cam0>; }; cmu_cam1: clock-controller@145d0000 { @@ -529,6 +534,7 @@ <&cmu_top CLK_ACLK_CAM1_333>, <&cmu_top CLK_ACLK_CAM1_400>, <&cmu_top CLK_ACLK_CAM1_552>; + power-domains = <&pd_cam1>; }; pd_gscl: gscl-power-domain@105c4000 { @@ -555,6 +561,38 @@ #power-domain-cells = <0>; }; + pd_cam0: cam0-power-domain@105c4020 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c4020 0x20>; + #power-domain-cells = <0>; + power-domains = <&pd_cam1>; + }; + + pd_cam1: cam1-power-domain@105c40a0 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c40a0 0x20>; + #power-domain-cells = <0>; + }; + + pd_isp: isp-power-domain@105c4140 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c4140 0x20>; + #power-domain-cells = <0>; + power-domains = <&pd_cam0>; + }; + + pd_g2d: g2d-power-domain@105c4120 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c4120 0x20>; + #power-domain-cells = <0>; + }; + + pd_g3d: g3d-power-domain@105c4060 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c4060 0x20>; + #power-domain-cells = <0>; + }; + pd_aud: aud-power-domain@105c40c0 { compatible = "samsung,exynos5433-pd"; reg = <0x105c40c0 0x20>; @@ -567,6 +605,12 @@ #power-domain-cells = <0>; }; + pd_hevc: hevc-power-domain@105c41c0 { + compatible = "samsung,exynos5433-pd"; + reg = <0x105c41c0 0x20>; + #power-domain-cells = <0>; + }; + tmu_atlas0: tmu@10060000 { compatible = "samsung,exynos5433-tmu"; reg = <0x10060000 0x200>;