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[209.132.180.67]) by mx.google.com with ESMTP id v30si8997866pgn.569.2017.10.19.10.11.28; Thu, 19 Oct 2017 10:11:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iK7uuQBM; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753607AbdJSRL0 (ORCPT + 12 others); Thu, 19 Oct 2017 13:11:26 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:51824 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755064AbdJSRIl (ORCPT ); Thu, 19 Oct 2017 13:08:41 -0400 Received: by mail-wm0-f66.google.com with SMTP id f4so17755737wme.0 for ; Thu, 19 Oct 2017 10:08:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=yz0QlVYN4g5sbf0S4c/Ilr/QnJHDN4zbgTqyOfaGHAY=; b=iK7uuQBMMH7tjmR40sW8gVxH9fmrPJRWYHM8/tfE3k1j0CRxN35viDpHqj9oJxIj+2 iVxF1TCeatjy4Fu3GYZOWT0oWnKysSbr7jyHVVEkf8CwXAnyqfas8Wwhupei844lBAiE srKPo+5m9hkr7l7J796mQoEhWw6pFV/cRLgFs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=yz0QlVYN4g5sbf0S4c/Ilr/QnJHDN4zbgTqyOfaGHAY=; b=svG28HVZ4kY6+JznUZjmZAWybtg174cifTjFUGpxcC9B6ldScrigJt+yPoyPPE9d/o cywNtJXO6AE/MwpX3dk8TH+/LCSi2gvei98BNXjEQNkcQvAmyydjvkJl2FhllMJfgWQE FlR+d7lHFR+BQ9UlWQSZtQiNCMDqa/cHIeMRWkgkm9v5y8ZkJviwadhmNK5HA6ClyHD2 vRvAXSizNrz1WgBXAbRZpc1P1RO9cMYwSfU9FIcFrDOblz9lB0J9Z6vWWmalNHTRS+rQ YlmtHdQjAOxzJSxJVdN6OguSqMYYcj/Mbosa6KAz/gUOmCXzHdNqj5YIqvKqetoaFfZE boug== X-Gm-Message-State: AMCzsaWvSWTzoVL/KYdVX6ghpR1CyATzbREPiNLjXdc85HG+cqL79gxR 3JwFhSrqXZUKabZWGmW7LF6Dew== X-Google-Smtp-Source: ABhQp+RuqN6CBdsmi3UYHKluB8lJf1IFQVo94CHUdjdYf2lX38Bq2YAr1MNdHMGIQTfPWh+UajZf8g== X-Received: by 10.28.17.77 with SMTP id 74mr2088179wmr.66.1508432920531; Thu, 19 Oct 2017 10:08:40 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:51c7:d9b7:e14b:6840]) by smtp.gmail.com with ESMTPSA id g16sm14277394wrd.72.2017.10.19.10.08.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 19 Oct 2017 10:08:40 -0700 (PDT) From: Daniel Lezcano To: edubezval@gmail.com, rui.zhang@intel.com Cc: linux-pm@vger.kernel.org, leo.yan@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/18] thermal/drivers/hisi: Fix configuration register setting Date: Thu, 19 Oct 2017 19:05:50 +0200 Message-Id: <1508432760-17847-8-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508432760-17847-1-git-send-email-daniel.lezcano@linaro.org> References: <6ac48f08-7fe6-92e9-0801-6ed3bcd05ff1@linaro.org> <1508432760-17847-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The TEMP0_CFG configuration register contains different field to set up the temperature controller. However in the code, nothing prevents a setup to overwrite the previous one: eg. writing the hdak value overwrites the sensor selection, the sensor selection overwrites the hdak value. In order to prevent such thing, use a regmap-like mechanism by reading the value before, set the corresponding bits and write the result. Signed-off-by: Daniel Lezcano --- drivers/thermal/hisi_thermal.c | 34 +++++++++++++++++++++++++++++----- 1 file changed, 29 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c index 8e8a117..690f0bd 100644 --- a/drivers/thermal/hisi_thermal.c +++ b/drivers/thermal/hisi_thermal.c @@ -30,6 +30,8 @@ #define TEMP0_TH (0x4) #define TEMP0_RST_TH (0x8) #define TEMP0_CFG (0xC) +#define TEMP0_CFG_SS_MSK (0xF000) +#define TEMP0_CFG_HDAK_MSK (0x30) #define TEMP0_EN (0x10) #define TEMP0_INT_EN (0x14) #define TEMP0_INT_CLR (0x18) @@ -132,19 +134,41 @@ static inline void hisi_thermal_enable(void __iomem *addr, int value) writel(value, addr + TEMP0_EN); } -static inline void hisi_thermal_sensor_select(void __iomem *addr, int sensor) +static inline int hisi_thermal_get_temperature(void __iomem *addr) { - writel((sensor << 12), addr + TEMP0_CFG); + return hisi_thermal_step_to_temp(readl(addr + TEMP0_VALUE)); } -static inline int hisi_thermal_get_temperature(void __iomem *addr) +/* + * Temperature configuration register - Sensor selection + * + * Bits [19:12] + * + * 0x0: local sensor (default) + * 0x1: remote sensor 1 (ACPU cluster 1) + * 0x2: remote sensor 2 (ACPU cluster 0) + * 0x3: remote sensor 3 (G3D) + */ +static inline void hisi_thermal_sensor_select(void __iomem *addr, int sensor) { - return hisi_thermal_step_to_temp(readl(addr + TEMP0_VALUE)); + writel((readl(addr + TEMP0_CFG) & ~TEMP0_CFG_SS_MSK) | + (sensor << 12), addr + TEMP0_CFG); } +/* + * Temperature configuration register - Hdak conversion polling interval + * + * Bits [5:4] + * + * 0x0 : 0.768 ms + * 0x1 : 6.144 ms + * 0x2 : 49.152 ms + * 0x3 : 393.216 ms + */ static inline void hisi_thermal_hdak_set(void __iomem *addr, int value) { - writel(value, addr + TEMP0_CFG); + writel((readl(addr + TEMP0_CFG) & ~TEMP0_CFG_HDAK_MSK) | + (value << 4), addr + TEMP0_CFG); } static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,