From patchwork Thu Apr 12 11:14:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 133264 Delivered-To: patches@linaro.org Received: by 10.46.84.29 with SMTP id i29csp1574076ljb; Thu, 12 Apr 2018 04:15:24 -0700 (PDT) X-Received: by 10.46.131.80 with SMTP id l16mr378275ljh.133.1523531724496; Thu, 12 Apr 2018 04:15:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523531724; cv=none; d=google.com; s=arc-20160816; b=D9VvHboW1NKXIjgUeQ9wFiBTBkG36vENkZLQOBXrat5p15evK0qEokw/no+l2NVo2z oI+nwWA0ChpD7eNEFVmdnA5Wop5oMa49ko3+Nwug24oYdz7VGdpVq/5kGv3j5AclaPnI 7GDPwYnBRFXDf3Gtl7WMyll6Zq4FAvvNLHlVhDPXXwQQNdGyml3rDGP6QmolqtWV/l8e 1c+t9xVSiDYCitIm7H44ZtXE03ftvkx9XZ6llrmgOs04/K8uU4IG2+s0mdT6noKILM4R VsiDPnSlPNk4SW/GxsTW62PUcug2FEjfPPuR1arhEpyOnMJPv/rolyp6W2YCdYPJhB9a IBqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=IIHiCEQkHG1b/nIuCHEJ9c4Cvzg0QwX/XRz1/Yv43Ow=; b=SkfU7tUN2HWiF25qctrbtgJ90kSTaqrAIefgFFxOxDiAV2wsaJEi276rRpu6RsQLg8 R8TycX/GbbY3/u6cOKfxmiFGb2JGI6poBkPp+tQ7TkFnUnMaQ6c8gL42sOEzw5IpAqxE rGQku6JtIr7wMnWKu/EwuJIzD2HKyYcAhXXr6Vh0A/kFgaie1WlhAlkH3ZQoARU4SKqS 1axWv1Ej0bzSqn5DiOMQtc58geT3C1E5FeXZDb6pN9139HBq76zjnmu0lrT3v+H3TLZE QuK2Fhdl0nnyKd4R3fUlHIdcDT7JK4Lt5A2Zj9H4xUkMsIJT01q5qY3VorSGYrUAYhN0 7Fcg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ip2YcZ4b; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id y194-v6sor899336lfd.95.2018.04.12.04.15.24 for (Google Transport Security); Thu, 12 Apr 2018 04:15:24 -0700 (PDT) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ip2YcZ4b; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IIHiCEQkHG1b/nIuCHEJ9c4Cvzg0QwX/XRz1/Yv43Ow=; b=Ip2YcZ4baT7qIUsN3y5QR0iqBIc7WSISvJ2BuTL6zkjcNl1PJr2JXhTXxByHsHgKoA 3J3dCCgHYsWa45OHiNAbt3zf9el5yuaBVI1YX6a5ALLDDdhRWxlNBWuKu/mukgEKsh7o +rQOjas24jYwavIa+vvsrZu1sz+cWBsU9j+tM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IIHiCEQkHG1b/nIuCHEJ9c4Cvzg0QwX/XRz1/Yv43Ow=; b=BKFsZeEDYbp4pB16GKgeuoanBGha9U5CmweVkgoQLlQ3/D++c0htiMWt/g3VRFFOyL Wb34v7oxryviz4JcdOKVjoHbvFhuDAwQWuGQZv/1LrbgdrghH1gE0ZAqE8yV21mwMAix 343EP/UT53gY+5Xd5dAWffpzH3fsMx14hUNLRpzR71e5eLrcT+zpwlJACpYtpn/aer2j lDg9DaEFQbUGzhLR6b7W1MULwDpp5VwX/VwTHUDMiJnYk0F/MTj7vbcDxkNJKe5DkldX rVhU0AWCwRS8FYOI6hcErMrB1L1EDnEhluOP5KI9bmIhM79/o5dnhrwAOrz8yN1joHuM 4uzw== X-Gm-Message-State: ALQs6tDGyDw1/cBmGDp9dJaS6lrIrjfvM3ZcKRADbDYy+0jmOWrFRGhl VkC/9BBwc+fC6yBREX75Iv4DS2Bp X-Google-Smtp-Source: AIpwx48n2Bo1GT2Uhv/dWp+TpReoUUIrsjVRGJeZw6qAx/G6Cj/OS0dFxxp4OLGlDYGnNWOwQsCEhQ== X-Received: by 2002:a19:6a16:: with SMTP id u22-v6mr5000049lfu.123.1523531724219; Thu, 12 Apr 2018 04:15:24 -0700 (PDT) Return-Path: Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id r29sm543187lje.72.2018.04.12.04.15.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 12 Apr 2018 04:15:23 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , linux-pm@vger.kernel.org Cc: Kevin Hilman , Lina Iyer , Lina Iyer , Ulf Hansson , Rob Herring , Daniel Lezcano , Thomas Gleixner , Vincent Guittot , Stephen Boyd , Juri Lelli , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , David Brown Subject: [PATCH v7 26/26] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Date: Thu, 12 Apr 2018 13:14:31 +0200 Message-Id: <1523531671-27491-27-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523531671-27491-1-git-send-email-ulf.hansson@linaro.org> References: <1523531671-27491-1-git-send-email-ulf.hansson@linaro.org> From: Lina Iyer In the hierarchical layout, we are creating power domains around each CPU and describes the idle states for them inside the power domain provider node. Note that, the CPU's idle states still needs to be compatible with "arm,idle-state". Furthermore, represent the CPU cluster as a separate master power domain, powering the CPU's power domains. The cluster node, contains the idle states for the cluster and each idle state needs to be compatible with the "domain-idle-state". If the running platform is using a PSCI FW that supports the OS initiated CPU suspend mode, which likely should be the case unless the PSCI FW is very old, this change makes the PSCI driver to enable it. Cc: Andy Gross Cc: David Brown Cc: Lina Iyer Signed-off-by: Lina Iyer Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 53 ++++++++++++++++++++++++++++++++--- 1 file changed, 49 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 66b318e..aff4b91 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -113,10 +113,10 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD0>; }; CPU1: cpu@1 { @@ -125,10 +125,10 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD1>; }; CPU2: cpu@2 { @@ -137,10 +137,10 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD2>; }; CPU3: cpu@3 { @@ -149,10 +149,10 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD3>; }; L2_0: l2-cache { @@ -169,12 +169,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000010>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000030>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu {