From patchwork Tue Oct 8 06:15:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 833798 Received: from mail-m2418.xmail.ntesmail.com (mail-m2418.xmail.ntesmail.com [45.195.24.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FA6C1D31A0; Tue, 8 Oct 2024 16:21:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.195.24.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728404510; cv=none; b=PFFVdVBPRSzGQ/KmcZ+BW0lPmtGgRBhh4Lo4Z43HA5e54GNJpYzMZSesv8t2LlPnSTxMRSL2fEqn6vtxEDFidwDKmidkm1FCL9LGcoxJm3/J356RB0reDuIyj1ZWRmxQnKZVhavPuh1SlqoVdJJAPb8KvFP/Qqe08WrM5jdWDVU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728404510; c=relaxed/simple; bh=yl4dISq0YVEakYYH4ZI4/QRARPq5MlVOrJ85VNE9HGQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=KozsBG4NQshCjg2j+dhRFD7CiJ9ORTjkkF5nkBSrKTRc0pLPyYheMe1H+Khlv4AFmW+6oksVwgTsfuCRTOo2LV5Qs9jkffSoZY4+hjj0VvjAMcJBrvWhR2/VPfbCk3WHSfXcKht0WjsdxTtPQBwj1srmi9/AYZbgTYh+2Vr1WJY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=gE3Col35; arc=none smtp.client-ip=45.195.24.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="gE3Col35" DKIM-Signature: a=rsa-sha256; b=gE3Col35CqUoFKgMiIJEIyITc9DndpI+HTvrNvd8zfyrYhKjcV6+pk9WbIvKoVwieeZ4GHcW6lV0tKtvOvbZztpU7nMT8rkSdF20DiAW12Im8BhL+n+Osh/U6J5Zt23Av17hPIqQ55zwetvxRiX22larxJmTF+NsgtVDdqMjjVg=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=X2RVKuuepMJ71UkowB4el7fjeh2DFavVJ1nWfvVkGV4=; h=date:mime-version:subject:message-id:from; Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTPA id 7081F520718; Tue, 8 Oct 2024 14:16:33 +0800 (CST) From: Shawn Lin To: Rob Herring , "James E . J . Bottomley" , "Martin K . Petersen" , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Heiko Stuebner Cc: Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , YiFeng Zhao , Liang Chen , linux-scsi@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Lin Subject: [PATCH v3 3/5] soc: rockchip: add header for suspend mode SIP interface Date: Tue, 8 Oct 2024 14:15:28 +0800 Message-Id: <1728368130-37213-4-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1728368130-37213-1-git-send-email-shawn.lin@rock-chips.com> References: <1728368130-37213-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGkJPTVZOGhlCThpCT0hMSkxWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a926ac5b36903afkunm7081f520718 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MRg6GBw5GjIvNhYOTi1MNw1W Ex8aCQpVSlVKTElDSE1DSkJOS0pJVTMWGhIXVQgTGgwVVRcSFTsJFBgQVhgTEgsIVRgUFkVZV1kS C1lBWU5DVUlJVUxVSkpPWVdZCAFZQUhKQ0o3Bg++ Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Add ROCKCHIP_SIP_SUSPEND_MODE to pass down parameters to Trusted Firmware in order to decide suspend mode. Currently only add ROCKCHIP_SLEEP_PD_CONFIG which teaches firmware to power down controllers or not. Signed-off-by: Shawn Lin --- Changes in v3: None Changes in v2: None include/soc/rockchip/rockchip_sip.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/soc/rockchip/rockchip_sip.h b/include/soc/rockchip/rockchip_sip.h index c46a9ae..501ad1f 100644 --- a/include/soc/rockchip/rockchip_sip.h +++ b/include/soc/rockchip/rockchip_sip.h @@ -6,6 +6,9 @@ #ifndef __SOC_ROCKCHIP_SIP_H #define __SOC_ROCKCHIP_SIP_H +#define ROCKCHIP_SIP_SUSPEND_MODE 0x82000003 +#define ROCKCHIP_SLEEP_PD_CONFIG 0xff + #define ROCKCHIP_SIP_DRAM_FREQ 0x82000008 #define ROCKCHIP_SIP_CONFIG_DRAM_INIT 0x00 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE 0x01