diff mbox series

[v7,01/47] clk: tegra: Export Tegra20 EMC kernel symbols

Message ID 20201104164923.21238-2-digetx@gmail.com
State Accepted
Commit 4cfdad35ae7ed400d7146aeb57d34744ce53e9dc
Headers show
Series Introduce memory interconnect for NVIDIA Tegra SoCs | expand

Commit Message

Dmitry Osipenko Nov. 4, 2020, 4:48 p.m. UTC
We're going to modularize Tegra EMC drivers and some of the EMC-clock
driver symbols need to be exported, let's export them.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/clk/tegra/clk-tegra20-emc.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Krzysztof Kozlowski Nov. 6, 2020, 6:23 p.m. UTC | #1
On Wed, Nov 04, 2020 at 07:48:37PM +0300, Dmitry Osipenko wrote:
> We're going to modularize Tegra EMC drivers and some of the EMC-clock

> driver symbols need to be exported, let's export them.

> 

> Acked-by: Thierry Reding <treding@nvidia.com>

> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

> ---

>  drivers/clk/tegra/clk-tegra20-emc.c | 3 +++

>  1 file changed, 3 insertions(+)


Thanks, applied.

I'll keep all Tegra patches on separate branch and I can provide
a stable tag for other tree. Just let me know.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/drivers/clk/tegra/clk-tegra20-emc.c b/drivers/clk/tegra/clk-tegra20-emc.c
index 03bf0009a33c..dd74b8543bf1 100644
--- a/drivers/clk/tegra/clk-tegra20-emc.c
+++ b/drivers/clk/tegra/clk-tegra20-emc.c
@@ -13,6 +13,7 @@ 
 #include <linux/clk-provider.h>
 #include <linux/clk/tegra.h>
 #include <linux/err.h>
+#include <linux/export.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/slab.h>
@@ -235,6 +236,7 @@  void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb,
 		emc->cb_arg = cb_arg;
 	}
 }
+EXPORT_SYMBOL_GPL(tegra20_clk_set_emc_round_callback);
 
 bool tegra20_clk_emc_driver_available(struct clk_hw *emc_hw)
 {
@@ -291,3 +293,4 @@  int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same)
 
 	return 0;
 }
+EXPORT_SYMBOL_GPL(tegra20_clk_prepare_emc_mc_same_freq);