From patchwork Thu Jun 3 08:18:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Tseng X-Patchwork-Id: 453712 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAD1FC47082 for ; Thu, 3 Jun 2021 08:18:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B5AD5613C9 for ; Thu, 3 Jun 2021 08:18:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229576AbhFCIT5 (ORCPT ); Thu, 3 Jun 2021 04:19:57 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:38566 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229822AbhFCIT5 (ORCPT ); Thu, 3 Jun 2021 04:19:57 -0400 X-UUID: 71995b59110a4742b933384800cfff5d-20210603 X-UUID: 71995b59110a4742b933384800cfff5d-20210603 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1126083495; Thu, 03 Jun 2021 16:18:10 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 3 Jun 2021 16:18:08 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 3 Jun 2021 16:18:08 +0800 From: Ben Tseng To: Fan Chen , Zhang Rui , Daniel Lezcano , , CC: Eduardo Valentin , Rob Herring , Mark Rutland , Matthias Brugger , , , , , , , Michael Kao , Ben Tseng Subject: [PATCH v4 3/3] dt-bindings: thermal: Add binding document for mt6873 thermal controller Date: Thu, 3 Jun 2021 16:18:06 +0800 Message-ID: <20210603081806.21154-4-ben.tseng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210603081806.21154-1-ben.tseng@mediatek.com> References: <20210603081806.21154-1-ben.tseng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Michael Kao This patch adds binding document for mt6873 thermal controller. Signed-off-by: Michael Kao Signed-off-by: Ben Tseng Reviewed-by: Rob Herring --- This patch depends on [1]. [1] https://patchwork.kernel.org/project/linux-mediatek/patch/20210524122053.17155-7-chun-jie.chen@mediatek.com/ --- .../bindings/thermal/mediatek-thermal-lvts.yaml | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal-lvts.yaml diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal-lvts.yaml b/Documentation/devicetree/bindings/thermal/mediatek-thermal-lvts.yaml new file mode 100644 index 0000000..69ffe7b --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal-lvts.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek-thermal-lvts.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek SoC LVTS thermal controller (DTS) binding + +maintainers: + - Yu-Chia Chang + - Ben Tseng + +properties: + compatible: + const: mediatek,mt6873-lvts + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: lvts_clk + + "#thermal-sensor-cells": + const: 0 + +required: + - "#thermal-sensor-cells" + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + dts: lvts@1100b000 { + compatible = "mediatek,mt6873-lvts"; + reg = <0x1100b000 0x1000>; + clocks = <&infracfg CLK_INFRA_THERM>; + clock-names = "lvts_clk"; + #thermal-sensor-cells = <0>; + interrupts = ; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&dts>; + trips { + cpu_alert1: cpu-alert1 { + temperature = <85000>; + hysteresis = <0>; + type = "passive"; + }; + + cpu_crit: cpu-crit { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; +...