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[94.29.17.251]) by smtp.gmail.com with ESMTPSA id y3sm494289lfa.240.2021.08.26.18.37.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Aug 2021 18:37:55 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Ulf Hansson , "Rafael J. Wysocki" , Kevin Hilman , Viresh Kumar , Stephen Boyd , Nishanth Menon Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v9 2/8] opp: Allow dev_pm_opp_set_clkname() to replace released clock Date: Fri, 27 Aug 2021 04:34:09 +0300 Message-Id: <20210827013415.24027-3-digetx@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210827013415.24027-1-digetx@gmail.com> References: <20210827013415.24027-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The opp_table->clk is set to error once clock is released by dev_pm_opp_put_clkname(). This doesn't allow to set clock again, until OPP table is re-created from scratch. Check opp_table->clk for both NULL and ERR_PTR to allow clock replacement. This is needed now by NVIDIA Tegra 3d driver for initializing performance state of multiple power domains, where PD driver sets and unsets OPP table clock while OPP table reference is held outside of PD. Signed-off-by: Dmitry Osipenko --- drivers/opp/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/opp/core.c b/drivers/opp/core.c index fae5267f5218..e26da1d4d6be 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -2136,7 +2136,7 @@ struct opp_table *dev_pm_opp_set_clkname(struct device *dev, const char *name) } /* clk shouldn't be initialized at this point */ - if (WARN_ON(opp_table->clk)) { + if (WARN_ON(!IS_ERR_OR_NULL(opp_table->clk))) { ret = -EBUSY; goto err; }