| Message ID | 20220408045908.21671-2-rex-bc.chen@mediatek.com |
|---|---|
| State | New |
| Headers | show |
| Series | cpufreq: mediatek: Cleanup and support MT8183 and MT8186 | expand |
On 08/04/2022 06:58, Rex-BC Chen wrote: > From: Jia-Wei Chang <jia-wei.chang@mediatek.com> > > MediaTek Cache Coherent Interconnect (CCI) uses software devfreq module > for scaling clock frequency and adjust voltage. > The phandle could be linked between CPU and MediaTek CCI for some > MediaTek SoCs, like MT8183 and MT8186. > Therefore, we add this property in cpufreq-mediatek.txt. > > Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com> > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > --- > .../devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt > index b8233ec91d3d..d1b3d430c25c 100644 > --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt > @@ -20,6 +20,10 @@ Optional properties: > Vsram to fit SoC specific needs. When absent, the voltage scaling > flow is handled by hardware, hence no software "voltage tracking" is > needed. > +- cci: MediaTek Cache Coherent Interconnect uses software devfreq module for scaling > + clock frequency and adjust voltage. You need to describe the type. I am a bit confused whether this is a cci (so cci-control-port property?) or an interconnect (so interconnect property)... It does not look like a generic property, so you need vendor prefix. > + For details, please refer to > + Documentation/devicetree/bindings/devfreq/mtk-cci.yaml Such file does not exist. Best regards, Krzysztof
On Fri, 2022-04-08 at 10:10 +0200, Krzysztof Kozlowski wrote: > On 08/04/2022 06:58, Rex-BC Chen wrote: > > From: Jia-Wei Chang <jia-wei.chang@mediatek.com> > > > > MediaTek Cache Coherent Interconnect (CCI) uses software devfreq > > module > > for scaling clock frequency and adjust voltage. > > The phandle could be linked between CPU and MediaTek CCI for some > > MediaTek SoCs, like MT8183 and MT8186. > > Therefore, we add this property in cpufreq-mediatek.txt. > > > > Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com> > > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > > --- > > .../devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 4 > > ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.txt > > index b8233ec91d3d..d1b3d430c25c 100644 > > --- a/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.txt > > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.txt > > @@ -20,6 +20,10 @@ Optional properties: > > Vsram to fit SoC specific needs. When absent, the > > voltage scaling > > flow is handled by hardware, hence no software "voltage > > tracking" is > > needed. > > +- cci: MediaTek Cache Coherent Interconnect uses software devfreq > > module for scaling > > + clock frequency and adjust voltage. > > You need to describe the type. I am a bit confused whether this is a > cci > (so cci-control-port property?) or an interconnect (so interconnect > property)... It does not look like a generic property, so you need > vendor prefix. Hello Krzysztof, Thanks for your review. Yes, this cci is not arm's cci (cci-control-port property), and it's mediatek's cci. I will revise this name to "mtk-cci" in next version. > > > + For details, please refer to > > + Documentation/devicetree/bindings/devfreq/mtk-cci.yaml > > Such file does not exist. This mediatek cci is still upstreaming in this patch: message-id:20220408052150.22536-2-johnson.wang@mediatek.com Do you have suggestion that I should put this reference? Or I just remove it and describe the mediatek cci in detail? BRs, Rex > > > Best regards, > Krzysztof
On Fri, 2022-04-08 at 13:49 +0200, Krzysztof Kozlowski wrote: > On 08/04/2022 12:24, Rex-BC Chen wrote: > > > > > > You need to describe the type. I am a bit confused whether this > > > is a > > > cci > > > (so cci-control-port property?) or an interconnect (so > > > interconnect > > > property)... It does not look like a generic property, so you > > > need > > > vendor prefix. > > > > Hello Krzysztof, > > > > Thanks for your review. > > > > Yes, this cci is not arm's cci (cci-control-port property), and > > it's > > mediatek's cci. I will revise this name to "mtk-cci" in next > > version. > > Vendor is "mediatek" and comma comes after it. See devicetree spec > paragraph 2.3.1. > Hello Krzysztof, OK, I will revise as "mediatek,cci" in next version. > > > > > > > > > + For details, please refer to > > > > + Documentation/devicetree/bindings/devfreq/mtk-cci.yaml > > > > > > Such file does not exist. > > > > This mediatek cci is still upstreaming in this patch: > > message-id:20220408052150.22536-2-johnson.wang@mediatek.com > > > > Do you have suggestion that I should put this reference? > > Or I just remove it and describe the mediatek cci in detail? > > It's ok, but you need to keep path/filename updated. > > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt index b8233ec91d3d..d1b3d430c25c 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt @@ -20,6 +20,10 @@ Optional properties: Vsram to fit SoC specific needs. When absent, the voltage scaling flow is handled by hardware, hence no software "voltage tracking" is needed. +- cci: MediaTek Cache Coherent Interconnect uses software devfreq module for scaling + clock frequency and adjust voltage. + For details, please refer to + Documentation/devicetree/bindings/devfreq/mtk-cci.yaml - #cooling-cells: For details, please refer to Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml