From patchwork Mon Dec 26 22:49:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 636930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C09B7C3DA7D for ; Mon, 26 Dec 2022 22:50:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232458AbiLZWuY (ORCPT ); Mon, 26 Dec 2022 17:50:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232487AbiLZWuH (ORCPT ); Mon, 26 Dec 2022 17:50:07 -0500 Received: from mail-il1-x12a.google.com (mail-il1-x12a.google.com [IPv6:2607:f8b0:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29C8325E7; Mon, 26 Dec 2022 14:50:06 -0800 (PST) Received: by mail-il1-x12a.google.com with SMTP id j28so6049324ila.9; Mon, 26 Dec 2022 14:50:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LZo1+zZbDU851svvZrpetQZsycA9nka/hfFDXAXts9I=; b=VT+s1JCH90UTNm8fVY1bB1Wx7bLPvjipR1LOcRQJBG6QCh0IPD5nEFOB7CghEafgdq QpBxQyALVrtivt3EoDZ4JPJZrSKy4JVxtsRWxmC4/dOWuIvniHJEweEnBnjhxKiOVhLa yDSST4vhUxdU4dNucJGcRZho8k/WWg/+Fddn2mrowvt+sCdFBalJMCCKFhAjBGvwJCUa x+CR+k1rlAE5EjIYfQPD0QJwT/RsSeT8Pjlq3HtBHnR1Dj6/Qe2luoF0KbGUTw4G6CgU anJSAF26wXsOrfBFIC5msp9s+4/qXpIEm7WviaGrc+OVM7ru8B9AHWq717JCuByRyrb4 1RqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LZo1+zZbDU851svvZrpetQZsycA9nka/hfFDXAXts9I=; b=uydg0IaikKnUSxoj9+NCpg+7RJEz1OvBme+rmfHR20wnCoI/SKB/IB0c1Mc0MrdszE 8QWGFLg5ufTAcZbthp+dc+8k4Wl/UEszThG7DLzJQO54+drkFuITrfbywSVCbiuFxQ9r ezHdqScAPh7OoU0FsbporVq3BsRc3yTympck2LJeQMwfNe88XeFxfzX8T3/D6KC5ABSS Ll6wLYVnnAK3ArfyIRZHOqVEoZJm1yih5TozXI8x8mt3oCnLPsjn1Ui5TCLuLErBd8li iLUvJivsmu1EScmYSuO9tB06SrhKOyLgUIt/ndVMX9ZnD0hCwffky9Z0ewfLlw2bK87u L+mA== X-Gm-Message-State: AFqh2kpLkFJrbKPZumqzjNrsq8E8XaUyvNv6aTJ2DYd+kqyI6G3w9ahd 6z15441ZxwuSTfaSZigN0j0= X-Google-Smtp-Source: AMrXdXufYvwEnol/khG5SZTqYyHGpBNRqlFQhVkqaspdOEKC8Scd2puo8ycX12atSOuMBXsyqivvvg== X-Received: by 2002:a92:4b0c:0:b0:302:fa94:c741 with SMTP id m12-20020a924b0c000000b00302fa94c741mr13414424ilg.3.1672095005434; Mon, 26 Dec 2022 14:50:05 -0800 (PST) Received: from localhost ([2607:fea8:a2df:3d00::e694]) by smtp.gmail.com with ESMTPSA id 15-20020a056e0211af00b00300df8bfcf5sm3712337ilj.14.2022.12.26.14.50.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Dec 2022 14:50:05 -0800 (PST) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Odelu Kukatla , Luca Weiss , Richard Acayan Subject: [PATCH 4/4] arm64: dts: qcom: sdm670: add opps for peripherals Date: Mon, 26 Dec 2022 17:49:44 -0500 Message-Id: <20221226224944.37242-5-mailingradian@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221226224944.37242-1-mailingradian@gmail.com> References: <20221226224944.37242-1-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The interconnects are now in place. Add Operating Performance Points for them to allow the kernel to properly manage them. Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 109 +++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 67a7428291e2..e91da9274bf3 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -418,6 +419,10 @@ sdhc_1: mmc@7c4000 { <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>; clock-names = "iface", "core", "xo", "ice", "bus"; + interconnects = <&aggre1_noc MASTER_EMMC 0 &aggre1_noc SLAVE_A1NOC_SNOC 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_EMMC_CFG 0>; + interconnect-names = "sdhc-ddr", "cpu-sdhc"; + operating-points-v2 = <&sdhc1_opp_table>; iommus = <&apps_smmu 0x140 0xf>; @@ -430,6 +435,38 @@ sdhc_1: mmc@7c4000 { non-removable; status = "disabled"; + + sdhc1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-20000000 { + opp-hz = /bits/ 64 <20000000>; + required-opps = <&rpmhpd_opp_min_svs>; + opp-peak-kBps = <80000 80000>; + opp-avg-kBps = <52286 80000>; + }; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmhpd_opp_low_svs>; + opp-peak-kBps = <200000 100000>; + opp-avg-kBps = <130718 100000>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_svs>; + opp-peak-kBps = <200000 130000>; + opp-avg-kBps = <130718 130000>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmhpd_opp_nom>; + opp-peak-kBps = <4096000 4096000>; + opp-avg-kBps = <1338562 1338562>; + }; + }; }; gpi_dma0: dma-controller@800000 { @@ -465,6 +502,8 @@ qupv3_id_0: geniqup@8c0000 { #address-cells = <2>; #size-cells = <2>; ranges; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>; + interconnect-names = "qup-core"; status = "disabled"; i2c0: i2c@880000 { @@ -478,6 +517,10 @@ i2c0: i2c@880000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, <&gpi_dma0 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -495,6 +538,10 @@ i2c1: i2c@884000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, <&gpi_dma0 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -512,6 +559,10 @@ i2c2: i2c@888000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, <&gpi_dma0 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -529,6 +580,10 @@ i2c3: i2c@88c000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, <&gpi_dma0 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -546,6 +601,10 @@ i2c4: i2c@890000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, <&gpi_dma0 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -563,6 +622,10 @@ i2c5: i2c@894000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, <&gpi_dma0 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -580,6 +643,10 @@ i2c6: i2c@898000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, <&gpi_dma0 1 6 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -597,6 +664,10 @@ i2c7: i2c@89c000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, <&gpi_dma0 1 7 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -637,6 +708,8 @@ qupv3_id_1: geniqup@ac0000 { #address-cells = <2>; #size-cells = <2>; ranges; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>; + interconnect-names = "qup-core"; status = "disabled"; i2c8: i2c@a80000 { @@ -650,6 +723,10 @@ i2c8: i2c@a80000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, <&gpi_dma1 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -667,6 +744,10 @@ i2c9: i2c@a84000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, <&gpi_dma1 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -684,6 +765,10 @@ i2c10: i2c@a88000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, <&gpi_dma1 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -701,6 +786,10 @@ i2c11: i2c@a8c000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, <&gpi_dma1 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -718,6 +807,10 @@ i2c12: i2c@a90000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, <&gpi_dma1 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -735,6 +828,10 @@ i2c13: i2c@a94000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, <&gpi_dma1 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -752,6 +849,10 @@ i2c14: i2c@a98000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>, <&gpi_dma1 1 6 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -769,6 +870,10 @@ i2c15: i2c@a9c000 { #address-cells = <1>; #size-cells = <0>; power-domains = <&rpmhpd SDM670_CX>; + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>, <&gpi_dma1 1 7 QCOM_GPI_I2C>; dma-names = "tx", "rx"; @@ -1014,6 +1119,10 @@ usb_1: usb@a6f8800 { resets = <&gcc GCC_USB30_PRIM_BCR>; + interconnects = <&aggre2_noc MASTER_USB3 0 &mem_noc SLAVE_EBI_CH0 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>; + interconnect-names = "usb-ddr", "apps-usb"; + status = "disabled"; usb_1_dwc3: usb@a600000 {