From patchwork Thu Jan 12 15:28:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Balsam CHIHI X-Patchwork-Id: 642477 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F297C54EBD for ; Thu, 12 Jan 2023 15:39:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240532AbjALPjw (ORCPT ); Thu, 12 Jan 2023 10:39:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240459AbjALPi4 (ORCPT ); Thu, 12 Jan 2023 10:38:56 -0500 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B76C750064 for ; Thu, 12 Jan 2023 07:29:59 -0800 (PST) Received: by mail-wm1-x334.google.com with SMTP id bi26-20020a05600c3d9a00b003d3404a89faso4101123wmb.1 for ; Thu, 12 Jan 2023 07:29:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zX/CQGZwby8Bq/JpQAndBnSTYre5Hfcs3oFccuKqTKw=; b=yNc6PMpxrO8M2h1fKar31wGacq668VpYXsRSM0w0MQyM69WYMb1SanLv5TG5w9Al4/ y4pzIKNXR24UVbxUPoKmpQY+6wCOwlb3+6qkKiU17hzAB2+CI21Ob7TySeoFu267GlLl rm2p0l7mRtUrYMhh089rnQko0ilyDhkafEz8cUloWEpHwYdCDZ7W6MlB2MrZPcijwarA rZiOLRpUm9ZHtk8NF8BQdQg5OPxXqykjfSI7VkDLURHhD9p0MEk9CyAJKLwOHH9/a/tU lmoTIXgt9C5tKiSe6rODgy7bT/9C5A1fAEkIMyrsEH89zmg3r2hzpwZbF3+3nnwquJ2/ X4AA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zX/CQGZwby8Bq/JpQAndBnSTYre5Hfcs3oFccuKqTKw=; b=ICmITmVKYr5OUF7YWw1oj7zoLzVGikSwlyIrI5Rx33gexV5QPWMKfKLYCUZeoGp7VV PhGdJqB8S3XkqQ3ZMI5+8KRjVRQCQy8DGLXMtQf6KGVgbismnr/voD5sq8pKjjB//Owy en/JW+16U6of9K2lxIsWn2zh7fV2rP3+QUNu9NkUyGb85DrbO0WYQlxwQaOozs2ykjF3 IWSyzbq3UmVRZNwsgoFQBs5wyHhgn9vUzlKmdA2cxZXKCFJHIiTvlzf9zy/U3KFHU1+e YO81ELQRuiyG7mGl6rTUZK3VR8mICDaWH+FXGnKL7nhZI33Hbp8foUUYVbLVfFaqVA8c JEZQ== X-Gm-Message-State: AFqh2kpOuPB2Jpp0ecvejPssUDn31ZKjiz6oyMhtZ1q8AlxCET/M5dMC s9+rT2HaQsVD+IxRA6zE5McrMw== X-Google-Smtp-Source: AMrXdXtAfb9mzBghn9Vyao04lelSKGhE8RNvs9VNj/kNNxGDnuIFsLJ3HpOeO5A8QJe7r8jyLiO0kA== X-Received: by 2002:a05:600c:3d90:b0:3d9:f798:dcba with SMTP id bi16-20020a05600c3d9000b003d9f798dcbamr8881980wmb.38.1673537398182; Thu, 12 Jan 2023 07:29:58 -0800 (PST) Received: from t480-bl003.civfrance.com (58.188.158.77.rev.sfr.net. [77.158.188.58]) by smtp.gmail.com with ESMTPSA id l24-20020a1ced18000000b003d99da8d30asm26395909wmh.46.2023.01.12.07.29.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Jan 2023 07:29:57 -0800 (PST) From: bchihi@baylibre.com To: daniel.lezcano@linaro.org, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, khilman@baylibre.com, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, james.lo@mediatek.com, rex-bc.chen@mediatek.com Subject: [PATCH v10 6/6] arm64/dts/mt8195: Add temperature mitigation threshold Date: Thu, 12 Jan 2023 16:28:55 +0100 Message-Id: <20230112152855.216072-7-bchihi@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112152855.216072-1-bchihi@baylibre.com> References: <20230112152855.216072-1-bchihi@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Balsam CHIHI The mt8195 board has several hotspots around the CPUs. Specify the targeted temperature threshold when to apply the mitigation and define the associated cooling devices. Signed-off-by: Balsam CHIHI --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 153 ++++++++++++++++++++--- 1 file changed, 137 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 683e5057d68d..0d6642603095 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -14,6 +14,7 @@ #include #include #include +#include #include / { @@ -2413,107 +2414,227 @@ dp_tx: dp-tx@1c600000 { thermal_zones: thermal-zones { cpu0-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; + polling-delay = <1000>; + polling-delay-passive = <250>; thermal-sensors = <&lvts_mcu MT819x_MCU_LITTLE_CPU0>; trips { + cpu0_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; cpu0_crit: trip-crit { temperature = <100000>; hysteresis = <2000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu0_alert>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu1-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; + polling-delay = <1000>; + polling-delay-passive = <250>; thermal-sensors = <&lvts_mcu MT819x_MCU_LITTLE_CPU1>; trips { + cpu1_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; cpu1_crit: trip-crit { temperature = <100000>; hysteresis = <2000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu1_alert>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu2-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; + polling-delay = <1000>; + polling-delay-passive = <250>; thermal-sensors = <&lvts_mcu MT819x_MCU_LITTLE_CPU2>; trips { + cpu2_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; cpu2_crit: trip-crit { temperature = <100000>; hysteresis = <2000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu2_alert>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu3-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; + polling-delay = <1000>; + polling-delay-passive = <250>; thermal-sensors = <&lvts_mcu MT819x_MCU_LITTLE_CPU3>; trips { + cpu3_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; cpu3_crit: trip-crit { temperature = <100000>; hysteresis = <2000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu3_alert>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu4-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; + polling-delay = <1000>; + polling-delay-passive = <250>; thermal-sensors = <&lvts_mcu MT819x_MCU_BIG_CPU0>; trips { + cpu4_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; cpu4_crit: trip-crit { temperature = <100000>; hysteresis = <2000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu4_alert>; + cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu5-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; + polling-delay = <1000>; + polling-delay-passive = <250>; thermal-sensors = <&lvts_mcu MT819x_MCU_BIG_CPU1>; trips { + cpu5_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; cpu5_crit: trip-crit { temperature = <100000>; hysteresis = <2000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu5_alert>; + cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu6-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; + polling-delay = <1000>; + polling-delay-passive = <250>; thermal-sensors = <&lvts_mcu MT819x_MCU_BIG_CPU2>; trips { + cpu6_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; cpu6_crit: trip-crit { temperature = <100000>; hysteresis = <2000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu6_alert>; + cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu7-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; + polling-delay = <1000>; + polling-delay-passive = <250>; thermal-sensors = <&lvts_mcu MT819x_MCU_BIG_CPU3>; trips { + cpu7_alert: trip-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; cpu7_crit: trip-crit { temperature = <100000>; hysteresis = <2000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu7_alert>; + cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; };