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Hermes SMTP Server) with ESMTPA ID 32d47a946aad3f7d203db987b930ba8f; Sun, 14 May 2023 12:31:53 +0000 (UTC) From: Jakob Hauser To: Sebastian Reichel , Lee Jones , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: Beomho Seo , Chanwoo Choi , Stephan Gerhold , Raymond Hackley , Pavel Machek , Axel Lin , ChiYuan Huang , Linus Walleij , Henrik Grimler , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Jakob Hauser Subject: [PATCH v5 03/10] mfd: rt5033: Fix STAT_MASK, HZ_MASK and AICR defines Date: Sun, 14 May 2023 14:31:23 +0200 Message-Id: <20230514123130.41172-4-jahau@rocketmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230514123130.41172-1-jahau@rocketmail.com> References: <20230514123130.41172-1-jahau@rocketmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The charger state mask RT5033_CHG_STAT_MASK should be 0x30 [1][2]. The high impedance mask RT5033_RT_HZ_MASK is actually value 0x02 [3] and is assosiated to the RT5033 CHGCTRL1 register [4]. Accordingly also change RT5033_CHARGER_HZ_ENABLE to 0x02 to avoid the need of a bit shift upon application. For input current limiting AICR mode, the define for the 1000 mA step was missing [5]. Additionally add the define for DISABLE option. Concerning the mask, remove RT5033_AICR_MODE_MASK because there is already RT5033_CHGCTRL1_IAICR_MASK further up. They are redundant and the upper one makes more sense to have the masks of a register colleted there as an overview. [1] https://github.com/msm8916-mainline/linux-downstream/blob/GT-I9195I/drivers/battery/rt5033_charger.c#L669-L682 [2] https://github.com/torvalds/linux/blob/v6.0/include/linux/mfd/rt5033-private.h#L59-L62 [3] https://github.com/msm8916-mainline/linux-downstream/blob/GT-I9195I/include/linux/battery/charger/rt5033_charger.h#L44 [4] https://github.com/msm8916-mainline/linux-downstream/blob/GT-I9195I/drivers/battery/rt5033_charger.c#L223 [5] https://github.com/msm8916-mainline/linux-downstream/blob/GT-I9195I/drivers/battery/rt5033_charger.c#L278 Signed-off-by: Jakob Hauser Acked-for-MFD-by: Lee Jones --- include/linux/mfd/rt5033-private.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/include/linux/mfd/rt5033-private.h b/include/linux/mfd/rt5033-private.h index b035a67cec73..b6773ebf4e6b 100644 --- a/include/linux/mfd/rt5033-private.h +++ b/include/linux/mfd/rt5033-private.h @@ -55,7 +55,7 @@ enum rt5033_reg { }; /* RT5033 Charger state register */ -#define RT5033_CHG_STAT_MASK 0x20 +#define RT5033_CHG_STAT_MASK 0x30 #define RT5033_CHG_STAT_DISCHARGING 0x00 #define RT5033_CHG_STAT_FULL 0x10 #define RT5033_CHG_STAT_CHARGING 0x20 @@ -67,6 +67,7 @@ enum rt5033_reg { /* RT5033 CHGCTRL1 register */ #define RT5033_CHGCTRL1_IAICR_MASK 0xe0 #define RT5033_CHGCTRL1_MODE_MASK 0x01 +#define RT5033_CHGCTRL1_HZ_MASK 0x02 /* RT5033 CHGCTRL2 register */ #define RT5033_CHGCTRL2_CV_MASK 0xfc @@ -92,7 +93,6 @@ enum rt5033_reg { /* RT5033 RT CTRL1 register */ #define RT5033_RT_CTRL1_UUG_MASK 0x02 -#define RT5033_RT_HZ_MASK 0x01 /* RT5033 control register */ #define RT5033_CTRL_FCCM_BUCK_MASK BIT(0) @@ -119,13 +119,14 @@ enum rt5033_reg { * register), AICR mode limits the input current. For example, the AIRC 100 * mode limits the input current to 100 mA. */ +#define RT5033_AICR_DISABLE 0x00 #define RT5033_AICR_100_MODE 0x20 #define RT5033_AICR_500_MODE 0x40 #define RT5033_AICR_700_MODE 0x60 #define RT5033_AICR_900_MODE 0x80 +#define RT5033_AICR_1000_MODE 0xa0 #define RT5033_AICR_1500_MODE 0xc0 #define RT5033_AICR_2000_MODE 0xe0 -#define RT5033_AICR_MODE_MASK 0xe0 /* RT5033 use internal timer need to set time */ #define RT5033_FAST_CHARGE_TIMER4 0x00 @@ -195,7 +196,7 @@ enum rt5033_reg { /* RT5033 charger high impedance mode */ #define RT5033_CHARGER_HZ_DISABLE 0x00 -#define RT5033_CHARGER_HZ_ENABLE 0x01 +#define RT5033_CHARGER_HZ_ENABLE 0x02 /* RT5033 regulator BUCK output voltage uV */ #define RT5033_REGULATOR_BUCK_VOLTAGE_MIN 1000000U