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[V7,6/7] Documentation: amd-pstate: introduce amd-pstate preferred core

Message ID 20230918081407.756858-7-li.meng@amd.com
State Superseded
Headers show
Series amd-pstate preferred core | expand

Commit Message

Meng Li Sept. 18, 2023, 8:14 a.m. UTC
Introduce amd-pstate preferred core.

check preferred core state:
$ cat /sys/devices/system/cpu/amd-pstate/prefcore

Signed-off-by: Meng Li <li.meng@amd.com>
 Documentation/admin-guide/pm/amd-pstate.rst | 58 ++++++++++++++++++++-
 1 file changed, 56 insertions(+), 2 deletions(-)
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diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst
index 1cf40f69278c..b729bc6dabd8 100644
--- a/Documentation/admin-guide/pm/amd-pstate.rst
+++ b/Documentation/admin-guide/pm/amd-pstate.rst
@@ -300,8 +300,8 @@  platforms. The AMD P-States mechanism is the more performance and energy
 efficiency frequency management method on AMD processors.
-AMD Pstate Driver Operation Modes
+``amd-pstate`` Driver Operation Modes
 ``amd_pstate`` CPPC has 3 operation modes: autonomous (active) mode,
 non-autonomous (passive) mode and guided autonomous (guided) mode.
@@ -353,6 +353,48 @@  is activated.  In this mode, driver requests minimum and maximum performance
 level and the platform autonomously selects a performance level in this range
 and appropriate to the current workload.
+``amd-pstate`` Preferred Core
+The core frequency is subjected to the process variation in semiconductors.
+Not all cores are able to reach the maximum frequency respecting the
+infrastructure limits. Consequently, AMD has redefined the concept of
+maximum frequency of a part. This means that a fraction of cores can reach
+maximum frequency. To find the best process scheduling policy for a given
+scenario, OS needs to know the core ordering informed by the platform through
+highest performance capability register of the CPPC interface.
+``amd-pstate`` preferred core enables the scheduler to prefer scheduling on
+cores that can achieve a higher frequency with lower voltage. The preferred
+core rankings can dynamically change based on the workload, platform conditions,
+thermals and ageing.
+The priority metric will be initialized by the ``amd-pstate`` driver. The ``amd-pstate``
+driver will also determine whether or not ``amd-pstate`` preferred core is
+supported by the platform.
+``amd-pstate`` driver will provide an initial core ordering when the system boots.
+The platform uses the CPPC interfaces to communicate the core ranking to the
+operating system and scheduler to make sure that OS is choosing the cores
+with highest performance firstly for scheduling the process. When ``amd-pstate``
+driver receives a message with the highest performance change, it will
+update the core ranking and set the cpu's priority.
+``amd-pstate`` Preferred Core Switch
+Kernel Parameters
+``amd-pstate`` peferred core`` has two states: enable and disable.
+Enable/disable states can be chosen by different kernel parameters.
+Default enable ``amd-pstate`` preferred core.
+For systems that support ``amd-pstate`` preferred core, the core rankings will
+always be advertised by the platform. But OS can choose to ignore that via the
+kernel parameter ``amd_prefcore=disable``.
 User Space Interface in ``sysfs`` - General
@@ -385,6 +427,18 @@  control its functionality at the system level.  They are located in the
         to the operation mode represented by that string - or to be
         unregistered in the "disable" case.
+	Preferred core state of the driver: "enabled" or "disabled".
+	"enabled"
+		Enable the ``amd-pstate`` preferred core.
+	"disabled"
+		Disable the ``amd-pstate`` preferred core
+        This attribute is read-only to check the state of preferred core.
 ``cpupower`` tool support for ``amd-pstate``