From patchwork Wed Jan 17 11:04:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 764414 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9819F1DFF7; Wed, 17 Jan 2024 11:05:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705489528; cv=none; b=LMPnFcA2pyplEh0/75KoJ8H35QCMurBC+gPEKKrmBtE4mr3h+g7u0dnfWZk5PkU7UHb3znrnWfVzltCMzOHnGk5QV3ewck1+pQcetgSan0J/NsiQln0YkGEd6m85/zbWfk2ILvF4NwHwdFj6FIMW1hgrU0sn5HPjp93FK7vmEwQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705489528; c=relaxed/simple; bh=nIv7S5Ssl4N8lcGZ7x7Xq/d2Wy+1wcwhH26hO4muSQ4=; h=Received:DKIM-Signature:Received:Received:Received:From:To:CC: Subject:Date:Message-ID:X-Mailer:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type: X-Originating-IP:X-ClientProxiedBy:X-QCInternal: X-Proofpoint-Virus-Version:X-Proofpoint-GUID: X-Proofpoint-ORIG-GUID:X-Proofpoint-Virus-Version: X-Proofpoint-Spam-Details; b=XEzhQ5aRUQRYGGYJPlSJR6DXO6PZC1xped68ivd1mjWjj14gQD8HbK9k2fN4nnJhl7AWz2cTBeLJCthu+qsaTGhps9LJyE1FoCvwGrEYnQZB7qk5pOy3bykT0/NUq3mVpD3wIwRCiHqU2XzfzUxdLvkSCuwdJTAS9h1zJih0bj8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=V8j9DuwT; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="V8j9DuwT" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40H79WtU011576; Wed, 17 Jan 2024 11:05:19 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=vlGPI0dnXph4HiaDHyobQa70eLKUOk82RAMp0wm6CyM=; b=V8 j9DuwTNd5tz2LjhZ5rXVlAg+jP3jrLoERpirnDOHCMf5noPjS/ZrzZDBpfGSri9G bsoKv/Zink52zHlU88/UflDk9rHakR6GCgwXSIm66xEOCC6rl6MsMDb3v/+kk12s hcfCtFSUMOi6YFgbLfG2YDVCmy88XAK3ZMDMtSt+jOm/jetpCzAmbdBWg5eGx+pi 64OItEJOsb3xoFxhdvMhf6+Vbvb5TZtF7xTvIzU4l0oBYcaJPGVw3zD0vKJ9bCab PI/iJGtxWm3CoDss8boGyRJcKYR3aswF0pTQkZiSq8gLV1Vd4Uu1m2JVw9UKG69p ClWRyJbDXjKSXRoLbqgw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3vp6sqrv3t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 Jan 2024 11:05:18 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40HB5IfI007943 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 Jan 2024 11:05:18 GMT Received: from hu-sibis-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 17 Jan 2024 03:05:13 -0800 From: Sibi Sankar To: , , , , , , , CC: , , , , , , Sibi Sankar Subject: [PATCH 3/3] cpufreq: scmi: Enable boost support Date: Wed, 17 Jan 2024 16:34:43 +0530 Message-ID: <20240117110443.2060704-4-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240117110443.2060704-1-quic_sibis@quicinc.com> References: <20240117110443.2060704-1-quic_sibis@quicinc.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: QzQ50FqTbV_MvgQ0K4SWefbpg7OZtc2b X-Proofpoint-ORIG-GUID: QzQ50FqTbV_MvgQ0K4SWefbpg7OZtc2b X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_06,2024-01-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 spamscore=0 clxscore=1015 impostorscore=0 mlxscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401170078 The X1E80100 SoC hosts a number cpu boost frequencies, so let's enable boost support if the freq_table has any opps marked as turbo in it. Signed-off-by: Sibi Sankar --- drivers/cpufreq/scmi-cpufreq.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/scmi-cpufreq.c b/drivers/cpufreq/scmi-cpufreq.c index e0aa85764451..4355ec73502e 100644 --- a/drivers/cpufreq/scmi-cpufreq.c +++ b/drivers/cpufreq/scmi-cpufreq.c @@ -34,6 +34,7 @@ const struct scmi_handle *handle; static struct scmi_device *scmi_dev; static struct scmi_protocol_handle *ph; static const struct scmi_perf_proto_ops *perf_ops; +static struct cpufreq_driver scmi_cpufreq_driver; static unsigned int scmi_cpufreq_get_rate(unsigned int cpu) { @@ -148,6 +149,12 @@ scmi_get_cpu_power(struct device *cpu_dev, unsigned long *power, return 0; } +static struct freq_attr *scmi_cpufreq_hw_attr[] = { + &cpufreq_freq_attr_scaling_available_freqs, + NULL, + NULL, +}; + static int scmi_limit_notify_cb(struct notifier_block *nb, unsigned long event, void *data) { unsigned long freq_hz; @@ -271,6 +278,17 @@ static int scmi_cpufreq_init(struct cpufreq_policy *policy) policy->fast_switch_possible = perf_ops->fast_switch_possible(ph, domain); + if (policy_has_boost_freq(policy)) { + ret = cpufreq_enable_boost_support(); + if (ret) { + dev_warn(cpu_dev, "failed to enable boost: %d\n", ret); + goto out_free_opp; + } else { + scmi_cpufreq_hw_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs; + scmi_cpufreq_driver.boost_enabled = true; + } + } + ret = perf_ops->perf_notify_support(ph, domain, &info); if (ret) dev_warn(cpu_dev, "failed to get supported notifications: %d\n", ret); @@ -348,7 +366,7 @@ static struct cpufreq_driver scmi_cpufreq_driver = { CPUFREQ_NEED_INITIAL_FREQ_CHECK | CPUFREQ_IS_COOLING_DEV, .verify = cpufreq_generic_frequency_table_verify, - .attr = cpufreq_generic_attr, + .attr = scmi_cpufreq_hw_attr, .target_index = scmi_cpufreq_set_target, .fast_switch = scmi_cpufreq_fast_switch, .get = scmi_cpufreq_get_rate,