From patchwork Wed Oct 9 09:52:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 834440 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 284D418DF65; Wed, 9 Oct 2024 09:53:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728467594; cv=none; b=JQoDcW/sBwdDMm2/Rf29qRTBj9Surt+jerh8hnOM+CiAI97ipiPoBB8vdfcRXdrKkIWFyJh+p3mfZ6bgv7us2yxslnHEYjTxGRcn+o6bl0R+s9LKMJ2wC8F0FIJ3YYY4ZDzNM0XTiIWccTeuwqHhE3eMFD13COWRsixU57QBeXQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728467594; c=relaxed/simple; bh=lPPE2ybB860dOVW+u2UW17xbPLNdG/vbXkTiBVYcZj8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=gHVeXhFDUXNwhDLi2jcC78/4oA9EIud+/v51SrzHQW7dTI3K4DttE88uusxasmPn0p4fm9I3TMjfS45mswedwHtEyn0gAYlp3xUvGGRMUn2hNPCUG2TLacwQCLx4x+neRExtMquk2ZxWneFP/h3/PkP08fAvK8K2R9NDNDoEK6c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=EzBK/GVZ; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="EzBK/GVZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728467593; x=1760003593; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lPPE2ybB860dOVW+u2UW17xbPLNdG/vbXkTiBVYcZj8=; b=EzBK/GVZpCmgIhBHhlGiBZN7dYSRZWArDYyFl8S5XZhNGbnnK3GOe9bE spJykN1UebDMokyANt0TWtjfpDNnSvTSuQh0WFVyVKEf6mKRXm4ssx681 Rus8MV1L+iWge/FPMegb3/A0qtcv8FLG3oP1iFE1MCtcLblWXXLVpZhs7 A2DLILFLz8NRf0FJhhpXPG/imwLZJan0gQXoIBhWrzII3FtzTxBqNiVcR jikPm+DTkwN0r7hyxFKdvwSXTyDrcZZQ0aaSrFAG5pa2CCAx3lEHhf/bZ 9qTfe29gVS4x3iHnxMNj4imr/BnbVdOQBTwk6wYTzs+Kmy1biaEX3XlAy g==; X-CSE-ConnectionGUID: Ilm8ml+xSiOn9ol9ty/jVg== X-CSE-MsgGUID: lf6vFL25QVaznDExJrBRsw== X-IronPort-AV: E=McAfee;i="6700,10204,11219"; a="38322803" X-IronPort-AV: E=Sophos;i="6.11,189,1725346800"; d="scan'208";a="38322803" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 02:53:12 -0700 X-CSE-ConnectionGUID: Gvh7v3wYQu2/P84owVVHrQ== X-CSE-MsgGUID: bBKcGyUOQ46Mv827kY313Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,189,1725346800"; d="scan'208";a="76506809" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.41]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 02:53:06 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , "Maciej W. Rozycki" , Jonathan Cameron , Lukas Wunner , Alexandru Gagniuc , Krishna chaitanya chundru , Srinivas Pandruvada , "Rafael J. Wysocki" , linux-pm@vger.kernel.org, Smita Koralahalli , linux-kernel@vger.kernel.org Cc: Daniel Lezcano , Amit Kucheria , Zhang Rui , Christophe JAILLET , =?utf-8?q?Ilpo_J=C3=A4r?= =?utf-8?q?vinen?= Subject: [PATCH v8 3/8] PCI: Refactor pcie_update_link_speed() Date: Wed, 9 Oct 2024 12:52:18 +0300 Message-Id: <20241009095223.7093-4-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241009095223.7093-1-ilpo.jarvinen@linux.intel.com> References: <20241009095223.7093-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 pcie_update_link_speed() is passed the Link Status register but not all callers have that value at hand nor need the value. Refactor pcie_update_link_speed() to include reading the Link Status register and create __pcie_update_link_speed() which can be used by the hotplug code that has the register value at hand beforehand (and needs the value for other purposes). Signed-off-by: Ilpo Järvinen Reviewed-by: Jonathan Cameron --- drivers/pci/hotplug/pciehp_hpc.c | 2 +- drivers/pci/pci.h | 7 ++++++- drivers/pci/probe.c | 12 +++++++----- 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 736ad8baa2a5..bb5a8d9f03ad 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -319,7 +319,7 @@ int pciehp_check_link_status(struct controller *ctrl) return -1; } - pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); + __pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); if (!found) { ctrl_info(ctrl, "Slot(%s): No device found\n", diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 14d00ce45bfa..6e827d47aa85 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -378,7 +378,12 @@ enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev); enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev); void __pcie_print_link_status(struct pci_dev *dev, bool verbose); void pcie_report_downtraining(struct pci_dev *dev); -void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); + +static inline void __pcie_update_link_speed(struct pci_bus *bus, u16 linksta) +{ + bus->cur_bus_speed = pcie_link_speed[linksta & PCI_EXP_LNKSTA_CLS]; +} +void pcie_update_link_speed(struct pci_bus *bus); /* Single Root I/O Virtualization */ struct pci_sriov { diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index af153a8e8225..c138daf78961 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -742,9 +742,13 @@ const char *pci_speed_string(enum pci_bus_speed speed) } EXPORT_SYMBOL_GPL(pci_speed_string); -void pcie_update_link_speed(struct pci_bus *bus, u16 linksta) +void pcie_update_link_speed(struct pci_bus *bus) { - bus->cur_bus_speed = pcie_link_speed[linksta & PCI_EXP_LNKSTA_CLS]; + struct pci_dev *bridge = bus->self; + u16 linksta; + + pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta); + __pcie_update_link_speed(bus, linksta); } EXPORT_SYMBOL_GPL(pcie_update_link_speed); @@ -827,13 +831,11 @@ static void pci_set_bus_speed(struct pci_bus *bus) if (pci_is_pcie(bridge)) { u32 linkcap; - u16 linksta; pcie_capability_read_dword(bridge, PCI_EXP_LNKCAP, &linkcap); bus->max_bus_speed = pcie_link_speed[linkcap & PCI_EXP_LNKCAP_SLS]; - pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta); - pcie_update_link_speed(bus, linksta); + pcie_update_link_speed(bus); } }