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Shenoy" CC: Perry Yuan , , , Dhananjay Ugwekar , Mario Limonciello Subject: [PATCH v2 09/16] cpufreq/amd-pstate: Change amd_pstate_update_perf() to return an int Date: Sun, 8 Dec 2024 00:30:24 -0600 Message-ID: <20241208063031.3113-10-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241208063031.3113-1-mario.limonciello@amd.com> References: <20241208063031.3113-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D8:EE_|CYYPR12MB8961:EE_ X-MS-Office365-Filtering-Correlation-Id: 84af7816-0a79-4030-d606-08dd1751e173 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: dK3br9Z11K7Ow1HCXvhG1lTSby3rSwhKdf1TAvz7PMMFcDjREINjAKgRPbivU5P7DblTbMo77f1tCGT70vOjTj17SlRuQlfS6QaXrQXml0xYYZnPncwVZnlFpnzQAncOYg9cViLTxC6dU5NH7evehLvHQ3lNwCpibpU2r5zbVsUnpW8eJslD3+6LUb+njUK9SySGWceQwyOnH6BjwmBzi9a+HNwHZVK3X+W4Mi9R+20WVAW19uECPWJVhciNYciVMAlszdBr7ngWWFGIkoUGZ1MgcDQikh22TSeZeCTBfbmZ/kR2CZ2r8amscFue6/0V2rEAXvQMpX0H9vxa8XCa38SD/4CZuCZgf9gUiya137b6GVBT2C1wL0QLXs11s/u9Y3l1W/hucXf4E8qAO8AQgnVzdcqeCPRHxfDDL1bPaIVPy0sPhIwZ368o1CSlBxglFvCKNr459PqS7AX6BtBJR+jsy2ALkTdgmQShMW8eczLUsMyn45m/aAHrlPzYVABmkhvC8rOZL+2y5TG19XO+o5fRkHjed5EuzQfaW8uSq6hvYhFNnR4nLflLrzexpxFnG+KRcontVmI0KDnih6xYugFeLDGogAr7drkGLp6zHct9LwwL+ry/mjdJ6JH/TpBm9zKY5Tm1kyVczOWVPIa/kGVrkE0p2XqqeLle7CF4wNUZW3KlXTodjA4bjYvOsxp0SAbcSSIDBdII5WMuUA7CCKI+MhaEJI715gcZd5ly4K89ByrLFfpo7JBnUBDomqy0ZKvPSuZviO68I3lPl4SkOdG3sZouarT/SMA06Bnw80hFKXzEM9WYAJJdRBf9gV1FL0AOn0NddnUw3UmeKJ5CcUoIiL5ThzM53JYdjeX9abl9gXrhJwBFurmlCkxub5Hw79k5tODcdam5iuGQK//e0pPIX/WUA5oFP30JmgrJexi/EDWciqOKb3ZPQ4IU5j7h4CpY//bnWlvLDcZxueBRKOn4lvjBzY5PIM4854i0NZA6Lru0KEMCLVQDeeSjh7nIf/5H6o8aLR150oiBC7urHmQYRfyRfxevOIZAbCEY0PgkmFu0WRpR8LzqbUJGydNYgJ5P8hQ+d/ekwSvTO4kOCpRwzVQCUAETZFQsRKn2oNJkXNhOtk8F+rmjR5CTNz/qxmXzxx5a8phTNio7ozz8nYxSYprc93I33aQHDPlOvfgi35kxETjTKnhByitJbv18kcBZ0jQkfQt1p4Sr8Yf8JMgTamO0VmkJnQ/dLfwAhQGQK1HcKttD9ZdObCc0jfl/ahgam/04csSSx5salf7gMxzUgZftJlNLCUnIpZCf1lsm1briJ4ibaxJkil4/PJtOuygpipoJ6qoUj+YfzTfq/Z1yb9GWmblwtYbnUs+dMmtZadYs2VB1WaN1h5p5mPBfnLtgV5ayeegmv3kQRwsxTqludIZvt4H6OtvEoappr+aYU2S6OYZB/CCSU5NXxdgH X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(376014)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Dec 2024 06:30:59.7014 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 84af7816-0a79-4030-d606-08dd1751e173 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D8.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8961 As msr_update_perf() calls an MSR it's possible that it fails. Pass this return code up to the caller. Reviewed-by: Gautham R. Shenoy Signed-off-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 8a173359c2754..3a3df67c096d5 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -251,24 +251,26 @@ static int amd_pstate_get_energy_pref_index(struct amd_cpudata *cpudata) return index; } -static void msr_update_perf(struct amd_cpudata *cpudata, u32 min_perf, +static int msr_update_perf(struct amd_cpudata *cpudata, u32 min_perf, u32 des_perf, u32 max_perf, bool fast_switch) { - if (fast_switch) + if (fast_switch) { wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached)); - else - wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, - READ_ONCE(cpudata->cppc_req_cached)); + return 0; + } + + return wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, + READ_ONCE(cpudata->cppc_req_cached)); } DEFINE_STATIC_CALL(amd_pstate_update_perf, msr_update_perf); -static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata, +static inline int amd_pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf, u32 des_perf, u32 max_perf, bool fast_switch) { - static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf, - max_perf, fast_switch); + return static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf, + max_perf, fast_switch); } static int msr_set_epp(struct amd_cpudata *cpudata, u32 epp) @@ -480,7 +482,7 @@ static inline int amd_pstate_init_perf(struct amd_cpudata *cpudata) return static_call(amd_pstate_init_perf)(cpudata); } -static void shmem_update_perf(struct amd_cpudata *cpudata, +static int shmem_update_perf(struct amd_cpudata *cpudata, u32 min_perf, u32 des_perf, u32 max_perf, bool fast_switch) { @@ -490,7 +492,7 @@ static void shmem_update_perf(struct amd_cpudata *cpudata, perf_ctrls.min_perf = min_perf; perf_ctrls.desired_perf = des_perf; - cppc_set_perf(cpudata->cpu, &perf_ctrls); + return cppc_set_perf(cpudata->cpu, &perf_ctrls); } static inline bool amd_pstate_sample(struct amd_cpudata *cpudata)