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Shenoy" CC: Perry Yuan , , , Dhananjay Ugwekar , Mario Limonciello Subject: [PATCH v3 10/15] cpufreq/amd-pstate: Move limit updating code Date: Mon, 9 Dec 2024 12:52:43 -0600 Message-ID: <20241209185248.16301-11-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241209185248.16301-1-mario.limonciello@amd.com> References: <20241209185248.16301-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A34B:EE_|CH3PR12MB7522:EE_ X-MS-Office365-Filtering-Correlation-Id: e20f7c69-14d3-4c2d-2af2-08dd1882bd49 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: lX7pbdOHck4DZcPpjD2mES6ftIZI1OSIxCad7vB9HxYrOYXnqsp/DQq8Ia7g0/bsFN+5BBTDtFnKKbkozaIY4Hqxspm6YGW2Q5PPtemWN0at1gEoCc36OugN8UN/+x2xby3ifRD8gul5Q2fKd+sijWBjo/tAzmsEW3hlgnNoeKifQ7YgCKYhFbTwq+wlL70F60JxsE4zrj61k2tKhVOXP4KW3HzJ6hhd676Dzbft38QunOyijTpYoQ7TswrBwPlwuoj9JCnnYr9LowfwfaadzA1iJACUzuZxBsNrhhJghLSw4Kw403DPx/VINc1guAlA/rkuDrUgX9hCPQZLXFK9QlLDqX5xsZKX2Ugcyv+l99EGZ1XnHoS+inSioq7g6pF1d3iv0GR6+WkDzhdLM2CZG53wfVDSk2NteSWe+UsSs600mGadx5lXlsXgOJCxF9vLMXkxsKZLKkx/gDOWw9jFsxgtrGAiM2cbL6+hg8OPXWh1f3WmWLM0yQgzrMQtp+0jNL+OyNQDF9ZWwNmvn7/foqxq8zfJJCRgjzza1nuIw9PkCu0di2B25MFG2VU73/+SKm7s+aj/jITES4p2UfapRuO3OgSec2TWo9mjDmNJnrjii9B6HDpJbp4u94psWBIrqFLOMiIAxgVzehF+eI/HvvfQ2tlbOhCLGxMpUZ6gXhLw72xaE59acKH4WvJ+wAv0TTeozUkxrqL1E2mPx+7gTMy4MaF8EUUOYU7nPjBv1vvWnWixJCb9VFdTQWkSjyIyiX51eleI1HiSMaqhxXQFOL99sleb/DVJUluiT9tLw7ffonknV5rzX+JU5E3EcFQl2MUmpSpz0X3vvODO2ZH63jCbC3Ieg8iA0cALxfj6N7r9Kl6OTNha6dj4vAEz16qGVlextSLZ1QiUN7u4Jx+wyFU4s+T3Cj7yeAsb0Hcs2n21vK971BZqtnIM3Md6PDiB0doMlnFbKokGF2JTCmAvZNQrpAxJDl/Iaf5ZD/e0maIuc+VKOiW+GqNQqTuHijLF/op58ndZ+sP9A1v5POdlTn5ZRhv7QPemicAIHBLg8hET8eW47hPhDXHqTeDgS1jKxW4Qx5iMrQagwWsQ+eX/oACQADdZzOvBgWJAkUMFnYvZGnaJWnT5XA6Cnv6hBVHVpsIGp8xmRLstF3Kkj/MgtCICHWtEwI07PdubRv9aTJSt3FHSgWPlSsT/zp1N91cHWcJle3OtsgRB8lxvOhUINAlM0jQJ8FKFZXOYqKsMRZm3Ln7A60jPK+33MQ1ZuUTmf1Vcn2GQOoA1q5TdC5HogB7MuFUwcespAIGf9MWPeHOaD75FMs3yoSB2DhMgNfj8pY01n/sfM/vyCSvtq2nsx6uUjFB9+6Ef7JVFuXwjRwFCJijH9fDoik9ra4weJEWosyRl92pATXTG2NHSZT2xJCPn+PfehX6Qu6jZhaICPgvr0HFc/irUeXuJGWqVi9z+ X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(376014)(36860700013)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2024 18:53:15.6201 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e20f7c69-14d3-4c2d-2af2-08dd1882bd49 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A34B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7522 The limit updating code in amd_pstate_epp_update_limit() should not only apply to EPP updates. Move it to amd_pstate_update_min_max_limit() so other callers can benefit as well. With this move it's not necessary to have clamp_t calls anymore because the verify callback is called when setting limits. Reviewed-by: Gautham R. Shenoy Signed-off-by: Mario Limonciello --- v2: * Drop lowest_perf variable --- drivers/cpufreq/amd-pstate.c | 28 +++++----------------------- 1 file changed, 5 insertions(+), 23 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 3a3df67c096d5..dc3c45b6f5103 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -537,10 +537,6 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf, u32 nominal_perf = READ_ONCE(cpudata->nominal_perf); u64 value = prev; - min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf, - cpudata->max_limit_perf); - max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf, - cpudata->max_limit_perf); des_perf = clamp_t(unsigned long, des_perf, min_perf, max_perf); max_freq = READ_ONCE(cpudata->max_limit_freq); @@ -607,7 +603,7 @@ static int amd_pstate_verify(struct cpufreq_policy_data *policy_data) static int amd_pstate_update_min_max_limit(struct cpufreq_policy *policy) { - u32 max_limit_perf, min_limit_perf, lowest_perf, max_perf, max_freq; + u32 max_limit_perf, min_limit_perf, max_perf, max_freq; struct amd_cpudata *cpudata = policy->driver_data; max_perf = READ_ONCE(cpudata->highest_perf); @@ -615,12 +611,8 @@ static int amd_pstate_update_min_max_limit(struct cpufreq_policy *policy) max_limit_perf = div_u64(policy->max * max_perf, max_freq); min_limit_perf = div_u64(policy->min * max_perf, max_freq); - lowest_perf = READ_ONCE(cpudata->lowest_perf); - if (min_limit_perf < lowest_perf) - min_limit_perf = lowest_perf; - - if (max_limit_perf < min_limit_perf) - max_limit_perf = min_limit_perf; + if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) + min_limit_perf = min(cpudata->nominal_perf, max_limit_perf); WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf); WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf); @@ -1562,28 +1554,18 @@ static void amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy) static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy) { struct amd_cpudata *cpudata = policy->driver_data; - u32 max_perf, min_perf; u64 value; s16 epp; - max_perf = READ_ONCE(cpudata->highest_perf); - min_perf = READ_ONCE(cpudata->lowest_perf); amd_pstate_update_min_max_limit(policy); - max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf, - cpudata->max_limit_perf); - min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf, - cpudata->max_limit_perf); value = READ_ONCE(cpudata->cppc_req_cached); - if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) - min_perf = min(cpudata->nominal_perf, max_perf); - value &= ~(AMD_CPPC_MAX_PERF_MASK | AMD_CPPC_MIN_PERF_MASK | AMD_CPPC_DES_PERF_MASK); - value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, max_perf); + value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, cpudata->max_limit_perf); value |= FIELD_PREP(AMD_CPPC_DES_PERF_MASK, 0); - value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, min_perf); + value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, cpudata->min_limit_perf); /* Get BIOS pre-defined epp value */ epp = amd_pstate_get_epp(cpudata, value);