From patchwork Wed Jun 18 10:22:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 898997 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 243A1285C86 for ; Wed, 18 Jun 2025 10:22:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750242154; cv=none; b=V+tYW0b4i1NTzwRS1UcgCj5896qZSGVU90V5pH+M1gCyOk5uIoK+iJP3b93UVbZgmGvYq5ND/6k7zUnQimGqkgUVf2juiDQsxaJbO2h6Ex0wRXeQxjCArXUaGUd/z+gZCDa4graYctIoDPEB1gYQ5uuwDHNiHndVE6fmGQZ6OcY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750242154; c=relaxed/simple; bh=OlOKEb1016tChtzQe/1JM0xl1h+O48eXY4P93Z5L2TY=; h=From:Date:Subject:MIME-Version:Message-Id:In-Reply-To:To:Cc: Content-Type:References; b=h2UVYM7GeaaTZrPpVQ83Ae5Sse5YDcVtdTPtmO52w8yngWBWlWMuPcGYvzWDFqRaswt0dt+SccAozUoWk4lNn9tLxfmO4LnpgkXzCMWegx1yzBU9+mA70NlRctLieP/mt8Hc4XZX8ZQlCBovTKRhH20aSl1lYKgai3FAYlx8O4E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=MGmjqVSP; arc=none smtp.client-ip=210.118.77.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="MGmjqVSP" Received: from eucas1p1.samsung.com (unknown [182.198.249.206]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20250618102229euoutp01252bd4c57c40c03358bb87bd4d1c12c2~KG-Yb85JM1906219062euoutp019 for ; Wed, 18 Jun 2025 10:22:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w1.samsung.com 20250618102229euoutp01252bd4c57c40c03358bb87bd4d1c12c2~KG-Yb85JM1906219062euoutp019 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1750242149; bh=tFyef9Zk5foTthqWHu/oFmYdMYhqggHXZgBAaGBnWFU=; h=From:Date:Subject:In-Reply-To:To:Cc:References:From; b=MGmjqVSP4FIayvMOMwTgyV2A8OHTlORbdxEeX56KWV4ihe630Tjpq1LMgZxE2z6oD eoR44u8VIwHSTdHmaWI1EPIPbt2kfDF/ZDjwDjcUbCDISbrk+hTKBm3PXPcgFk6S1p u//DZJGksCAG52PKB0kHjkhyhXINMvcQxkdHCJvo= Received: from eusmtip1.samsung.com (unknown [203.254.199.221]) by eucas1p1.samsung.com (KnoxPortal) with ESMTPA id 20250618102228eucas1p1906803f73cc004e68f281b2bdf871da3~KG-X8Syqe1595015950eucas1p1U; Wed, 18 Jun 2025 10:22:28 +0000 (GMT) Received: from AMDC4942.eu.corp.samsungelectronics.net (unknown [106.210.136.40]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250618102227eusmtip11305416c6f5b7e92a8f4c4b15a74c1b9~KG-W_GGjU1000610006eusmtip1F; Wed, 18 Jun 2025 10:22:27 +0000 (GMT) From: Michal Wilczynski Date: Wed, 18 Jun 2025 12:22:09 +0200 Subject: [PATCH v5 3/8] pmdomain: thead: Instantiate GPU power sequencer via auxiliary bus Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250618-apr_14_for_sending-v5-3-27ed33ea5c6f@samsung.com> In-Reply-To: <20250618-apr_14_for_sending-v5-0-27ed33ea5c6f@samsung.com> To: Drew Fustini , Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Wilczynski , Bartosz Golaszewski , Philipp Zabel , Frank Binns , Matt Coster , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ulf Hansson , Marek Szyprowski Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org X-Mailer: b4 0.15-dev X-CMS-MailID: 20250618102228eucas1p1906803f73cc004e68f281b2bdf871da3 X-Msg-Generator: CA X-RootMTR: 20250618102228eucas1p1906803f73cc004e68f281b2bdf871da3 X-EPHeader: CA X-CMS-RootMailID: 20250618102228eucas1p1906803f73cc004e68f281b2bdf871da3 References: <20250618-apr_14_for_sending-v5-0-27ed33ea5c6f@samsung.com> In order to support the complex power sequencing required by the TH1520 GPU, the AON power domain driver must be responsible for initiating the corresponding sequencer driver. This functionality is specific to platforms where the GPU power sequencing hardware is controlled by the AON block. Extend the AON power domain driver to check for the presence of the "gpu-clkgen" reset in its own device tree node. If the property is found, create and register a new auxiliary device. This device acts as a proxy that allows the dedicated `pwrseq-thead-gpu` auxiliary driver to bind and take control of the sequencing logic. Signed-off-by: Michal Wilczynski --- drivers/pmdomain/thead/Kconfig | 1 + drivers/pmdomain/thead/th1520-pm-domains.c | 51 ++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/drivers/pmdomain/thead/Kconfig b/drivers/pmdomain/thead/Kconfig index 7d52f8374b074167d508a80fd807929c53faef12..208828e0fa0dc91256bf808b905bea32bb84250d 100644 --- a/drivers/pmdomain/thead/Kconfig +++ b/drivers/pmdomain/thead/Kconfig @@ -4,6 +4,7 @@ config TH1520_PM_DOMAINS tristate "Support TH1520 Power Domains" depends on TH1520_AON_PROTOCOL select REGMAP_MMIO + select AUXILIARY_BUS help This driver enables power domain management for the T-HEAD TH-1520 SoC. On this SoC there are number of power domains, diff --git a/drivers/pmdomain/thead/th1520-pm-domains.c b/drivers/pmdomain/thead/th1520-pm-domains.c index f702e20306f469aeb0ed15e54bd4f8309f28018c..9040b698e7f7f2400163841530fecacfb0f917bc 100644 --- a/drivers/pmdomain/thead/th1520-pm-domains.c +++ b/drivers/pmdomain/thead/th1520-pm-domains.c @@ -5,6 +5,7 @@ * Author: Michal Wilczynski */ +#include #include #include #include @@ -128,6 +129,50 @@ static void th1520_pd_init_all_off(struct generic_pm_domain **domains, } } +static void th1520_pd_pwrseq_unregister_adev(void *adev) +{ + auxiliary_device_delete(adev); + auxiliary_device_uninit(adev); +} + +static int th1520_pd_pwrseq_gpu_init(struct device *dev) +{ + struct auxiliary_device *adev; + int ret; + + /* + * Correctly check only for the property's existence in the DT node. + * We don't need to get/claim the reset here; that is the job of + * the auxiliary driver that we are about to spawn. + */ + if (device_property_match_string(dev, "reset-names", "gpu-clkgen") < 0) + /* + * This is not an error. It simply means the optional sequencer + * is not described in the device tree. + */ + return 0; + + adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL); + if (!adev) + return -ENOMEM; + + adev->name = "pwrseq-gpu"; + adev->dev.parent = dev; + + ret = auxiliary_device_init(adev); + if (ret) + return ret; + + ret = auxiliary_device_add(adev); + if (ret) { + auxiliary_device_uninit(adev); + return ret; + } + + return devm_add_action_or_reset(dev, th1520_pd_pwrseq_unregister_adev, + adev); +} + static int th1520_pd_probe(struct platform_device *pdev) { struct generic_pm_domain **domains; @@ -186,8 +231,14 @@ static int th1520_pd_probe(struct platform_device *pdev) if (ret) goto err_clean_genpd; + ret = th1520_pd_pwrseq_gpu_init(dev); + if (ret) + goto err_clean_provider; + return 0; +err_clean_provider: + of_genpd_del_provider(dev->of_node); err_clean_genpd: for (i--; i >= 0; i--) pm_genpd_remove(domains[i]);