From patchwork Mon Jun 23 16:05:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Frattaroli X-Patchwork-Id: 899612 Received: from sender4-op-o12.zoho.com (sender4-op-o12.zoho.com [136.143.188.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 253F028ECD1; Mon, 23 Jun 2025 16:08:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.12 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750694930; cv=pass; b=fiDCfceYAa2oehVWdoqWWKJCFfJyGUwA3sjhpcUvSM3mKOyzpixOXf6xI0IFjkhS1L/otrsIcR8dzkmZmfnBBP4CI88fDetsXQfss2ODplMD9i2VLe1mtvhLvaRdzM1QwvnriOpLjLUnq/Xe8iPD3l7T4FdwSeNNdwCxEnJpFPE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750694930; c=relaxed/simple; bh=aiod/Yf3LUabaSzGRckSRwxrJISYBdLmNpyOKiYbTuY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u0GRMG7TIMNJaSLiNUG2Z31jSaZW16AfH55VgehWQ7XefZSRqOu/YswA7pW4JrH7QrLzGukC5kXcO4UYpznpiVw7vYAiG2ke+d2cRGjYZI5W0syqwx31a1ET0V866NSpJOMOds1n8tJOAaDR6ZnGclavBBhKNGl8rIzlfu3Ps/A= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=DrNzhYPa; arc=pass smtp.client-ip=136.143.188.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="DrNzhYPa" ARC-Seal: i=1; a=rsa-sha256; t=1750694871; cv=none; d=zohomail.com; s=zohoarc; b=nQFwrAmDTRE2uQfnwlZKMnlAEi+inZk07WlTtcxlyDuuWQUoU9scRve7sJPRTFlSjLQk52Eud3owCGXtNnrpXE+PPBkKQd0xXRCpo5R6j1UcGZ1D6f50L2z2DfyBRgTfRlgrU7ti3KrS/2R/tc7cTz22h2srOHEMl1bgVrIqgY8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1750694871; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=7qeu209avxF0OpWa6sxALT6m2kEZIO42KKuVUIgEmSk=; b=fW2k1Yszjx+BGnyz/mDccYnHp0YpNB7b4ukG3pfFEeNsyuW8CZBbnBrsyxCybAmjIIoTjI7WHFbDqELe4oBjqngmOE3t7BzW73Uwu9Rmw6HOmbIY+jJY6JfJ8pPTDTk7CeS1Q7Hx5nkOxatKOQRDupO1K3vJokL26MSfsrOkmEM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1750694871; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=7qeu209avxF0OpWa6sxALT6m2kEZIO42KKuVUIgEmSk=; b=DrNzhYPahgxjYqQahY9ySUlPIzH3m8vyIuSAZ21nd4NR6SHIATlXOsB43LsptFsi QCcUSmHZEwN4aIXTDVBzJuIU5NQLOvnxc4xT2SKXhmalF2ZgSRUF6kX632vreQB3zHH 8ijohyu48xNTrVPl7YnX9J8I8G+UwhrXQGNZLL1k= Received: by mx.zohomail.com with SMTPS id 1750694868495967.9784952167641; Mon, 23 Jun 2025 09:07:48 -0700 (PDT) From: Nicolas Frattaroli Date: Mon, 23 Jun 2025 18:05:37 +0200 Subject: [PATCH v2 09/20] phy: rockchip-samsung-dcphy: switch to FIELD_PREP_WM16 macro Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250623-byeword-update-v2-9-cf1fc08a2e1f@collabora.com> References: <20250623-byeword-update-v2-0-cf1fc08a2e1f@collabora.com> In-Reply-To: <20250623-byeword-update-v2-0-cf1fc08a2e1f@collabora.com> To: Yury Norov , Rasmus Villemoes , Jaehoon Chung , Ulf Hansson , Heiko Stuebner , Shreeya Patel , Mauro Carvalho Chehab , Sandy Huang , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Vinod Koul , Kishon Vijay Abraham I , Nicolas Frattaroli , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Shawn Lin , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Chanwoo Choi , MyungJoo Ham , Kyungmin Park , Qin Jian , Michael Turquette , Stephen Boyd , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt Cc: kernel@collabora.com, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org, linux-sound@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, llvm@lists.linux.dev, Nicolas Frattaroli X-Mailer: b4 0.14.2 The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. phy-rockchip-samsung-dcphy is actually an exemplary example, where the similarities to FIELD_PREP were spotted and the driver local macro has the same semantics as the new FIELD_PREP_WM16 hw_bitfield.h macro. Still, get rid of FIELD_PREP_HIWORD now that a shared implementation exists, replacing the two instances of it with FIELD_PREP_WM16. This gives us slightly better error checking; the value is now checked to fit in 16 bits. Signed-off-by: Nicolas Frattaroli --- drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c index 28a052e17366516d5a99988bec9a52e3f0f09101..4508a314727232473e90fd1649ec0f2829b65c49 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -20,12 +21,6 @@ #include #include -#define FIELD_PREP_HIWORD(_mask, _val) \ - ( \ - FIELD_PREP((_mask), (_val)) | \ - ((_mask) << 16) \ - ) - #define BIAS_CON0 0x0000 #define I_RES_CNTL_MASK GENMASK(6, 4) #define I_RES_CNTL(x) FIELD_PREP(I_RES_CNTL_MASK, x) @@ -252,8 +247,8 @@ /* MIPI_CDPHY_GRF registers */ #define MIPI_DCPHY_GRF_CON0 0x0000 -#define S_CPHY_MODE FIELD_PREP_HIWORD(BIT(3), 1) -#define M_CPHY_MODE FIELD_PREP_HIWORD(BIT(0), 1) +#define S_CPHY_MODE FIELD_PREP_WM16(BIT(3), 1) +#define M_CPHY_MODE FIELD_PREP_WM16(BIT(0), 1) enum hs_drv_res_ohm { STRENGTH_30_OHM = 0x8,