From patchwork Tue Dec 22 10:16:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 58856 Delivered-To: patch@linaro.org Received: by 10.112.89.199 with SMTP id bq7csp3139858lbb; Tue, 22 Dec 2015 02:17:13 -0800 (PST) X-Received: by 10.98.79.66 with SMTP id d63mr34620690pfb.34.1450779433460; Tue, 22 Dec 2015 02:17:13 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id sw10si3585212pab.55.2015.12.22.02.17.13; Tue, 22 Dec 2015 02:17:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932666AbbLVKRM (ORCPT + 11 others); Tue, 22 Dec 2015 05:17:12 -0500 Received: from mail-pf0-f173.google.com ([209.85.192.173]:34768 "EHLO mail-pf0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932181AbbLVKRL (ORCPT ); Tue, 22 Dec 2015 05:17:11 -0500 Received: by mail-pf0-f173.google.com with SMTP id u7so57929585pfb.1 for ; Tue, 22 Dec 2015 02:17:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=EjOb/GYEkIZDw57TbpaX6QXvHkoiM41AJr63KMjep1o=; b=EiWeUysCw4VKq0Id5o1J6HxnvCPTMeEr24KvU2zhFKfX6/wuXD6nkeVuzI1DcmQuPK cQzUXDLaPmYrB/8xbcQfIZ/xRbAXRYSdr66s6cB563Fep1aFCM8rc7+pGzhlmGS7GLbk 9L9oxFmbtzo1kVPrkzH7bEF7g5O+uX8X06lfY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=EjOb/GYEkIZDw57TbpaX6QXvHkoiM41AJr63KMjep1o=; b=eRIMiAxQiSRtdaOhWjBXTUUyaWICo53vethEBiTursM5N9oAwESKctMFGt4I87rXy4 mCuwQvvXpPtM0CekpZz5+y53HuEzsC6PfUhpcCFWPW7e8c6dyGOhJCdLlIjGZISrdzvJ OkICH0VVZ2SJTNaCYUlo8r7JWk5ZGqqZGECOZWm/1CiKrOzzOOPW53A1qOSiw8iCa43o 0Gq8PMV7UPWrSdv+I8sIyZu8BCjJDZQgoY6YHacAKTusaLtDIMRbZjc1IRJ+SqRTOaKr v5zQw/1NTGXJaBLtyZOr+WL+wqdn7wDJ35jvmiMx8AVEb7AvdHhCLzOoDHtNWwbmSvea T9TQ== X-Gm-Message-State: ALoCoQktXbZFaWrlRIxWRefx+1LBTfxW4KCt18uGtfM0hDnHKNl20z2GLUvj+pPMNmN2JezexOva0+1oeBc6tYFGORE+4LnzmA== X-Received: by 10.98.8.14 with SMTP id c14mr24910453pfd.19.1450779431226; Tue, 22 Dec 2015 02:17:11 -0800 (PST) Received: from localhost ([122.171.29.67]) by smtp.gmail.com with ESMTPSA id x10sm40225655pfa.14.2015.12.22.02.17.10 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Tue, 22 Dec 2015 02:17:10 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, Stephen Boyd , nm@ti.com, Viresh Kumar Subject: [PATCH 14/17] cpufreq: dt: Reuse dev_pm_opp_get_max_transition_latency() Date: Tue, 22 Dec 2015 15:46:15 +0530 Message-Id: <25c4f290a6d03cee3239ea68273bc229c8f939d3.1450777582.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.7.0.rc1.186.g94414c4 In-Reply-To: References: In-Reply-To: References: Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org OPP layer has all the information now to calculate transition latency (clock_latency + voltage_latency). Lets reuse the OPP layer helper dev_pm_opp_get_max_transition_latency() instead of open coding the same in cpufreq-dt driver. Signed-off-by: Viresh Kumar --- drivers/cpufreq/cpufreq-dt.c | 48 ++++---------------------------------------- 1 file changed, 4 insertions(+), 44 deletions(-) -- 2.7.0.rc1.186.g94414c4 -- To unsubscribe from this list: send the line "unsubscribe linux-pm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c index 8b6e55f62852..01a7354b1ada 100644 --- a/drivers/cpufreq/cpufreq-dt.c +++ b/drivers/cpufreq/cpufreq-dt.c @@ -214,7 +214,6 @@ static int cpufreq_init(struct cpufreq_policy *policy) struct regulator *cpu_reg; struct clk *cpu_clk; struct dev_pm_opp *suspend_opp; - unsigned long min_uV = ~0, max_uV = 0; unsigned int transition_latency; bool opp_v1 = false; const char *name = NULL; @@ -313,49 +312,6 @@ static int cpufreq_init(struct cpufreq_policy *policy) priv->reg_name = name; of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance); - transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev); - if (!transition_latency) - transition_latency = CPUFREQ_ETERNAL; - - if (!IS_ERR(cpu_reg)) { - unsigned long opp_freq = 0; - - /* - * Disable any OPPs where the connected regulator isn't able to - * provide the specified voltage and record minimum and maximum - * voltage levels. - */ - while (1) { - struct dev_pm_opp *opp; - unsigned long opp_uV, tol_uV; - - rcu_read_lock(); - opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq); - if (IS_ERR(opp)) { - rcu_read_unlock(); - break; - } - opp_uV = dev_pm_opp_get_voltage(opp); - rcu_read_unlock(); - - tol_uV = opp_uV * priv->voltage_tolerance / 100; - if (regulator_is_supported_voltage(cpu_reg, - opp_uV - tol_uV, - opp_uV + tol_uV)) { - if (opp_uV < min_uV) - min_uV = opp_uV; - if (opp_uV > max_uV) - max_uV = opp_uV; - } - - opp_freq++; - } - - ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV); - if (ret > 0) - transition_latency += ret * 1000; - } - ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table); if (ret) { dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret); @@ -390,6 +346,10 @@ static int cpufreq_init(struct cpufreq_policy *policy) cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs; } + transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev); + if (!transition_latency) + transition_latency = CPUFREQ_ETERNAL; + policy->cpuinfo.transition_latency = transition_latency; of_node_put(np);