From patchwork Wed May 1 13:58:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163216 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4554582ill; Wed, 1 May 2019 06:58:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqzxQfiqVD5xDUOoz7AbLs8xjAalO6R5ulweqCu8jvx3itf2acU9VBx+nAdKvYZxGunPnQSk X-Received: by 2002:a65:44cb:: with SMTP id g11mr14603311pgs.193.1556719127043; Wed, 01 May 2019 06:58:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556719127; cv=none; d=google.com; s=arc-20160816; b=WReHujDAvCXVsnd8Zslv0VMLL597o5Y8oAULoeA9Dc9sJD7iIOKHZXhEOP6Zcm/bOb 7tnZIa5LCCSSw2nIvYhkWOT92j0hWDcU8lK6ma+gyuaon0HxLsvdQ9vElXDBtecDLMHU OYlu9NRXG/iSk4d8IVAOV9nWDkfQl+9rjNhIXZ32aKA5xNB6RqscA2EoxQRNCtlZTcwz BYjqE6Y0iMwk6o8/oG6TBXA9y37Vgu5lgeTopdAFBD7XhsOfDaSSV+GM31GJbMuS5g2Q OuDeP9gM3/XQVWxvxo+0HmC1Z133CJx/njeFDp2F/NKZcjnnc+1xvYtGeaV1MtqLjYcL TVKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=gxq6Lpkf3eM6MTkC1BRE3aoxMLSX9cIsM2NglG17q6o=; b=kOTsK66j8EQA2+rusqfUDNunztFycczt07Fx8RhpAtoiGsDmtS0OCYSO0AOQJclB7H QLfK04+AMR4NmWBPRC88hbCUgWr7rgkK2MmaJMLKZGaBM1wCGge5uxLlNOVIl8FtIrjT egIbY0Bu/rMrtFqBZUEedzack8dmhOMhmjeM/EeGgec5n7y13DXpq2TincBFBWD/t+sY s3CBTeL9yPfMNIRTWBaxwJJKaCctvF39Bl76noxFkWmoeLn98/ZgmIdzKFlRrnmPn7z6 VHNZxVdtvvW1gurZF/eQIV/f0ML6mSmsWo1g+zpUlnbz8LKqyzopkZ0Ol5x/BBzPgRGD 5PEQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-rt-users-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i12si1245874pfa.110.2019.05.01.06.58.46; Wed, 01 May 2019 06:58:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-rt-users-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-rt-users-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726648AbfEAN6p (ORCPT + 3 others); Wed, 1 May 2019 09:58:45 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59674 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726497AbfEAN6o (ORCPT ); Wed, 1 May 2019 09:58:44 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C67D0A78; Wed, 1 May 2019 06:58:43 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 52F583F5AF; Wed, 1 May 2019 06:58:41 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall , Eric Auger Subject: [PATCH v3 3/7] irqchip/gicv2m: Don't map the MSI page in gicv2m_compose_msi_msg() Date: Wed, 1 May 2019 14:58:20 +0100 Message-Id: <20190501135824.25586-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190501135824.25586-1-julien.grall@arm.com> References: <20190501135824.25586-1-julien.grall@arm.com> Sender: linux-rt-users-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rt-users@vger.kernel.org gicv2m_compose_msi_msg() may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg() requires to be called from a preemptible context. A recent change split iommu_dma_map_msi_msg() in two new functions: one that should be called in preemptible context, the other does not have any requirement. The GICv2m driver is reworked to avoid executing preemptible code in non-preemptible context. This can be achieved by preparing the MSI mapping when allocating the MSI interrupt. Signed-off-by: Julien Grall Reviewed-by: Eric Auger --- Changes in v3: - Add Eric's reviewed-by Changes in v2: - Rework the commit message to use imperative mood --- drivers/irqchip/irq-gic-v2m.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index f5fe0100f9ff..4359f0583377 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -110,7 +110,7 @@ static void gicv2m_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) if (v2m->flags & GICV2M_NEEDS_SPI_OFFSET) msg->data -= v2m->spi_offset; - iommu_dma_map_msi_msg(data->irq, msg); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg); } static struct irq_chip gicv2m_irq_chip = { @@ -167,6 +167,7 @@ static void gicv2m_unalloc_msi(struct v2m_data *v2m, unsigned int hwirq, static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) { + msi_alloc_info_t *info = args; struct v2m_data *v2m = NULL, *tmp; int hwirq, offset, i, err = 0; @@ -186,6 +187,11 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, hwirq = v2m->spi_start + offset; + err = iommu_dma_prepare_msi(info->desc, + v2m->res.start + V2M_MSI_SETSPI_NS); + if (err) + return err; + for (i = 0; i < nr_irqs; i++) { err = gicv2m_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err)