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(91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4361ec75410sm104456185e9.1.2024.12.14.14.04.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Dec 2024 14:04:50 -0800 (PST) From: Ivaylo Ivanov To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 0/2] i2c: exynos5: Add support for Exynos8895 SoC Date: Sun, 15 Dec 2024 00:04:17 +0200 Message-ID: <20241214220419.723100-1-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hey folks, This series adds HSI2C support for Exynos8895 to i2c-exynos5. HSI2C buses here are mostly available implemented in USIv1 blocks, with 5 available externally - hsi2c_0 to 4. hsi2c_0 is available for PMIC (although I've never seen it used) and it uses BUSC clocks, which are still not implemented in the current clock driver, so I've decided to leave it out for now. In the next few patchsets support for USIv1 will be added to the exynos-usi driver and with that the rest of the I2C buses will be made available. Kind regards, Ivo Ivaylo Ivanov (2): dt-bindings: i2c: exynos5: Add samsung,exynos8895-hsi2c compatible i2c: exynos5: Add support for Exynos8895 SoC .../devicetree/bindings/i2c/i2c-exynos5.yaml | 26 ++++++++++++++-- drivers/i2c/busses/i2c-exynos5.c | 31 +++++++++++++++++-- 2 files changed, 52 insertions(+), 5 deletions(-)