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[0/2] initial usb support for ExynosAutov920 soc

Message ID 20250514140741.415981-1-pritam.sutar@samsung.com
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Series initial usb support for ExynosAutov920 soc | expand

Message

Pritam Manohar Sutar May 14, 2025, 2:07 p.m. UTC 
This SoC has a DWC3 compatible USB controller

The USB 3.1 DRD controller has the following features:
    * compliant with both USB device 3.1 and USB device 2.0 standards
    * compliant with USB host 3.1 and USB host 2.0 standards
    * supports USB device 3.1 and USB device 2.0 interfaces
    * supports USB host 3.1 and USB host 2.0 interfaces
    * full-speed (12 Mbps) and high-speed (480 Mbps) modes with USB device
      2.0 interface
    * super-speed (5 Gbps) mode with USB device 3.1 Gen1 interface
    * super-speed plus (10 Gbps) mode with USB device 3.1 Gen2 interface
    * single USB port which can be used for USB 3.1 or USB 2.0
    * on-chip USB PHY transceiver
    * DWC3 compatible
    * supports up to 16 bi-directional endpoints
    * compliant with xHCI 1.1 specification

Pritam Manohar Sutar (2):
  dt-bindings: usb: samsung,exynos-dwc3: add dt-schema ExynosAutov920
  usb: dwc3-exynos: add support for ExynosAutov920

 .../bindings/usb/samsung,exynos-dwc3.yaml        | 16 ++++++++++++++++
 drivers/usb/dwc3/dwc3-exynos.c                   |  9 +++++++++
 2 files changed, 25 insertions(+)

Comments

Krzysztof Kozlowski May 15, 2025, 9:08 a.m. UTC | #1 
On 14/05/2025 16:07, Pritam Manohar Sutar wrote:

>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynosautov920-dwusb3
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 2
> +          maxItems: 2
> +        clock-names:
> +          items:
> +            - const: ref
> +            - const: susp_clk
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof