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USB31DRD phy support for Google Tensor gs101 (HS & SS)
| 6 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[v3,6/6] phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS)
USB31DRD phy support for Google Tensor gs101 (HS & SS)
-
-
-
2024-06-17
André Draszik
New
[v3,5/6] phy: exynos5-usbdrd: convert Vbus supplies to regulator_bulk
USB31DRD phy support for Google Tensor gs101 (HS & SS)
-
-
-
2024-06-17
André Draszik
New
[v3,4/6] phy: exynos5-usbdrd: convert (phy) register access clock to clk_bulk
USB31DRD phy support for Google Tensor gs101 (HS & SS)
-
-
-
2024-06-17
André Draszik
New
[v3,3/6] phy: exynos5-usbdrd: convert core clocks to clk_bulk
USB31DRD phy support for Google Tensor gs101 (HS & SS)
-
-
-
2024-06-17
André Draszik
New
[v3,2/6] phy: exynos5-usbdrd: support isolating HS and SS ports independently
USB31DRD phy support for Google Tensor gs101 (HS & SS)
-
-
-
2024-06-17
André Draszik
New
[v3,1/6] dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible
USB31DRD phy support for Google Tensor gs101 (HS & SS)
-
-
-
2024-06-17
André Draszik
New