From patchwork Sun Dec 11 06:51:41 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: thomas.abraham@linaro.org X-Patchwork-Id: 5577 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5B1DB23E19 for ; Sun, 11 Dec 2011 06:50:24 +0000 (UTC) Received: from mail-bw0-f52.google.com (mail-bw0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 4A8B1A1846E for ; Sun, 11 Dec 2011 06:50:24 +0000 (UTC) Received: by mail-bw0-f52.google.com with SMTP id 17so5858557bke.11 for ; Sat, 10 Dec 2011 22:50:24 -0800 (PST) Received: by 10.204.157.12 with SMTP id z12mr4445963bkw.18.1323586224065; Sat, 10 Dec 2011 22:50:24 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.129.2 with SMTP id hg2cs17227bkc; Sat, 10 Dec 2011 22:50:23 -0800 (PST) Received: by 10.68.73.71 with SMTP id j7mr21434889pbv.54.1323586221735; Sat, 10 Dec 2011 22:50:21 -0800 (PST) Received: from mailout4.samsung.com (mailout4.samsung.com. [203.254.224.34]) by mx.google.com with ESMTP id z4si4786319pbp.172.2011.12.10.22.50.20; Sat, 10 Dec 2011 22:50:21 -0800 (PST) Received-SPF: neutral (google.com: 203.254.224.34 is neither permitted nor denied by best guess record for domain of thomas.abraham@linaro.org) client-ip=203.254.224.34; Authentication-Results: mx.google.com; spf=neutral (google.com: 203.254.224.34 is neither permitted nor denied by best guess record for domain of thomas.abraham@linaro.org) smtp.mail=thomas.abraham@linaro.org Received: from epcpsbgm2.samsung.com (mailout4.samsung.com [203.254.224.34]) by mailout4.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTP id <0LW1003YX1NO9830@mailout4.samsung.com> for patches@linaro.org; Sun, 11 Dec 2011 15:50:20 +0900 (KST) X-AuditID: cbfee61b-b7b95ae00000198b-9d-4ee452abdfad Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (MMPCPMTA) with SMTP id 2D.4F.06539.BA254EE4; Sun, 11 Dec 2011 15:50:20 +0900 (KST) Received: from localhost.localdomain ([107.108.73.37]) by mmp1.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTPA id <0LW100EBB1NIOE80@mmp1.samsung.com> for patches@linaro.org; Sun, 11 Dec 2011 15:50:19 +0900 (KST) From: Thomas Abraham To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, grant.likely@secretlab.ca, rob.herring@calxeda.com, kgene.kim@samsung.com, patches@linaro.org Subject: [PATCH v2 4/4] ARM: Exynos4: Add device tree support for external wakeup interrupt controller Date: Sun, 11 Dec 2011 12:21:41 +0530 Message-id: <1323586301-24537-5-git-send-email-thomas.abraham@linaro.org> X-Mailer: git-send-email 1.6.6.rc2 In-reply-to: <1323586301-24537-4-git-send-email-thomas.abraham@linaro.org> References: <1323586301-24537-1-git-send-email-thomas.abraham@linaro.org> <1323586301-24537-2-git-send-email-thomas.abraham@linaro.org> <1323586301-24537-3-git-send-email-thomas.abraham@linaro.org> <1323586301-24537-4-git-send-email-thomas.abraham@linaro.org> X-Brightmail-Tracker: AAAAAA== Add device tree support for external wakeup source interrupt controller on Exynos4. Cc: Rob Herring Cc: Grant Likely Signed-off-by: Thomas Abraham --- .../bindings/arm/samsung/wakeup-eint.txt | 26 ++++++++++++++++++++ arch/arm/mach-exynos/cpu.c | 7 ++++- arch/arm/mach-exynos/irq-eint.c | 4 ++- arch/arm/plat-samsung/include/plat/exynos4.h | 5 +++- 4 files changed, 38 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt diff --git a/Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt b/Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt new file mode 100644 index 0000000..7906e5b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/samsung/wakeup-eint.txt @@ -0,0 +1,26 @@ +* Samsung Exynos4 External Wakeup Interrupt Source Controller + +Samsung Exynos4 processor supports 32 external wakeup interrupt sources. First +16 of these interrupts are directly connected to GIC and the rest 16 of the +interrupts are grouped together to deliver a single interrupt to GIC. + +Required properties: + +- compatible: should be "samsung,exynos4210-wakeup-eint". +- interrupt-controller: Identifies the node as an interrupt controller. +- interrupt-cells: Specifies the number of cells required to specify the + interrupt source number. The value of should be <2>. The first cell + represents the wakeup interrupt source number and the second cell + should be zero (currently unused). + +Optional properties: +- interrupt-parent: phandle of the parent interrupt controller, required if + not inheriting the interrupt parent from the parent node. + +Example: + + wakeup_eint: interrupt-controller-wakeup-eint { + compatible = "samsung,exynos4210-wakeup-eint"; + #interrupt-cells = <2>; + interrupt-controller; + }; diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c index 2e6ae21..12165b1 100644 --- a/arch/arm/mach-exynos/cpu.c +++ b/arch/arm/mach-exynos/cpu.c @@ -261,6 +261,8 @@ static const struct of_device_id exynos4_dt_irq_match[] = { { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, { .compatible = "samsung,exynos4120-combiner", .data = combiner_of_init, }, + { .compatible = "samsung,exynos4210-wakeup-eint", + .data = exynos4_init_irq_eint, }, {}, }; #endif @@ -281,15 +283,16 @@ void __init exynos4_init_irq(void) gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base; gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base; - if (!of_have_populated_dt()) + if (!of_have_populated_dt()) { combiner_of_init(NULL, NULL); + exynos4_init_irq_eint(NULL, NULL); + } /* The parameters of s5p_init_irq() are for VIC init. * Theses parameters should be NULL and 0 because EXYNOS4 * uses GIC instead of VIC. */ s5p_init_irq(NULL, 0); - exynos4_init_irq_eint(); } struct sysdev_class exynos4_sysclass = { diff --git a/arch/arm/mach-exynos/irq-eint.c b/arch/arm/mach-exynos/irq-eint.c index c8bad66..4ee88f6 100644 --- a/arch/arm/mach-exynos/irq-eint.c +++ b/arch/arm/mach-exynos/irq-eint.c @@ -197,7 +197,8 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) chained_irq_exit(chip, desc); } -int __init exynos4_init_irq_eint(void) +int __init exynos4_init_irq_eint(struct device_node *np, + struct device_node *parent) { int irq, hwirq; struct irq_domain *domain = &exynos4_eint_irq_domain; @@ -210,6 +211,7 @@ int __init exynos4_init_irq_eint(void) } domain->nr_irq = EXYNOS4_EINT_NR; domain->ops = &irq_domain_simple_ops; + domain->of_node = np; irq_domain_add(domain); irq_domain_for_each_irq(domain, hwirq, irq) { diff --git a/arch/arm/plat-samsung/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h index a501461..5895f8b 100644 --- a/arch/arm/plat-samsung/include/plat/exynos4.h +++ b/arch/arm/plat-samsung/include/plat/exynos4.h @@ -12,6 +12,8 @@ /* Common init code for EXYNOS4 related SoCs */ +#include + extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); extern void exynos4_register_clocks(void); extern void exynos4210_register_clocks(void); @@ -24,7 +26,8 @@ extern void exynos4_init_irq(void); extern void exynos4_map_io(void); extern void exynos4_init_clocks(int xtal); extern struct sys_timer exynos4_timer; -extern int exynos4_init_irq_eint(void); +extern int exynos4_init_irq_eint(struct device_node *np, + struct device_node *parent); #define exynos4_init_uarts exynos4_common_init_uarts