From patchwork Wed Dec 11 10:40:16 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikas C Sajjan X-Patchwork-Id: 22245 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yh0-f71.google.com (mail-yh0-f71.google.com [209.85.213.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id F0E6120E7C for ; Wed, 11 Dec 2013 10:40:37 +0000 (UTC) Received: by mail-yh0-f71.google.com with SMTP id f64sf13003631yha.10 for ; Wed, 11 Dec 2013 02:40:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=6vJFqJkaSpO2+BYruJ0OuVVDz4zOauLlftRcFWSwGek=; b=NZIYn+jDAaR4X0FbinQV+2Wa7FdHV4MGcJAczH9mWsXIiN8XAhQkvJ2kcVvVLUJ/oY 9THPY5NZXwa4xgkxXI5DMhuppIxnW3QObjPhgXRyh1rJSztccm6Vh1waZLRen9eCstTm C42cJnGRVNe3n1lXq0UXkmKiDjwZGtjcFKPop/IsZn62SsaC4mgUIDn87jcyplM5y3cz qwjCdZF/kiqwU5o4dFZgLuBvGf8CMlGkpc0XdL9hPXhOIQPVFfxdsBEwKdk8cq6t5Rh4 f40TPuim4jQB1WXH1jBPFCyTLs0qsE6QdPZASisYe7HIs3OywSVN0GmqzcXcJswfn5F+ 2vIg== X-Gm-Message-State: ALoCoQmupfWAXs/E0YdUvyFvzyOWjkkBavWSB7/w5f/LAByqsjXiBHyQOTamYOpeRAORd2lyMNmf X-Received: by 10.236.127.199 with SMTP id d47mr177360yhi.29.1386758437758; Wed, 11 Dec 2013 02:40:37 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.116.42 with SMTP id jt10ls40696qeb.66.gmail; Wed, 11 Dec 2013 02:40:37 -0800 (PST) X-Received: by 10.52.157.232 with SMTP id wp8mr239728vdb.4.1386758437627; Wed, 11 Dec 2013 02:40:37 -0800 (PST) Received: from mail-vc0-f171.google.com (mail-vc0-f171.google.com [209.85.220.171]) by mx.google.com with ESMTPS id pu5si6338843veb.135.2013.12.11.02.40.37 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 11 Dec 2013 02:40:37 -0800 (PST) Received-SPF: neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.171; Received: by mail-vc0-f171.google.com with SMTP id ik5so5452864vcb.2 for ; Wed, 11 Dec 2013 02:40:37 -0800 (PST) X-Received: by 10.58.210.39 with SMTP id mr7mr280537vec.18.1386758437285; Wed, 11 Dec 2013 02:40:37 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp260607vcz; Wed, 11 Dec 2013 02:40:36 -0800 (PST) X-Received: by 10.66.121.234 with SMTP id ln10mr884160pab.20.1386758436395; Wed, 11 Dec 2013 02:40:36 -0800 (PST) Received: from mail-pb0-f52.google.com (mail-pb0-f52.google.com [209.85.160.52]) by mx.google.com with ESMTPS id sw1si13193610pbc.162.2013.12.11.02.40.36 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 11 Dec 2013 02:40:36 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.52 is neither permitted nor denied by best guess record for domain of vikas.sajjan@linaro.org) client-ip=209.85.160.52; Received: by mail-pb0-f52.google.com with SMTP id uo5so9647615pbc.25 for ; Wed, 11 Dec 2013 02:40:36 -0800 (PST) X-Received: by 10.68.196.227 with SMTP id ip3mr670898pbc.163.1386758434516; Wed, 11 Dec 2013 02:40:34 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id bp5sm31636064pbb.18.2013.12.11.02.40.30 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 11 Dec 2013 02:40:33 -0800 (PST) From: Vikas Sajjan To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, t.figa@samsung.com, patches@linaro.org, linaro-kernel@lists.linaro.org, linux-arm-kernel@lists.infradead.org, joshi@samsung.com Subject: [PATCH 2/2] ARM: EXYNOS: Add CMU virtual addresses for exynos5260 Date: Wed, 11 Dec 2013 16:25:16 +0545 Message-Id: <1386758416-31065-3-git-send-email-vikas.sajjan@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1386758416-31065-1-git-send-email-vikas.sajjan@linaro.org> References: <1386758416-31065-1-git-send-email-vikas.sajjan@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: vikas.sajjan@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Young-Gun Jang Adds CMU virtual addresses for exynos5260. Change-Id: Ia4f4eda96187d8d9e1edfc1a6b025af56d3bc43e Signed-off-by: Young-Gun Jang Signed-off-by: Vikas Sajjan --- arch/arm/mach-exynos/common.c | 65 ++++++++++++++++++++++++++ arch/arm/mach-exynos/include/mach/map.h | 14 ++++++ arch/arm/mach-exynos/include/mach/regs-clock.h | 17 +++++++ arch/arm/plat-samsung/include/plat/map-s5p.h | 16 +++++++ 4 files changed, 112 insertions(+) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 70da5c4..350b730 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -332,6 +332,71 @@ static struct map_desc exynos5260_iodesc[] __initdata = { .length = SZ_16K, .type = MT_DEVICE, }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_TOP, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_TOP), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_PERI, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_PERI), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_EGL, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_EGL), + .length = SZ_8K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_KFC, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_KFC), + .length = SZ_8K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_G2D, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_G2D), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_MIF, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_MIF), + .length = SZ_8K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_MFC, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_MFC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_G3D, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_G3D), + .length = SZ_8K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_FSYS, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_FSYS), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_AUD, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_AUD), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_ISP, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_ISP), + .length = SZ_8K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_GSCL, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_GSCL), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)EXYNOS5260_VA_CMU_DISP, + .pfn = __phys_to_pfn(EXYNOS5260_PA_CMU_DISP), + .length = SZ_4K, + .type = MT_DEVICE, + }, { .virtual = (unsigned long)S3C_VA_WATCHDOG, .pfn = __phys_to_pfn(EXYNOS5_PA_WATCHDOG), .length = SZ_4K, diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index cc190b9..fa1b565 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -48,6 +48,20 @@ #define EXYNOS5260_PA_SYS_DISP 0x14540000 #define EXYNOS5260_PA_SYS_AUD 0x128F0000 +#define EXYNOS5260_PA_CMU_TOP 0x10010000 +#define EXYNOS5260_PA_CMU_PERI 0x10200000 +#define EXYNOS5260_PA_CMU_EGL 0x10600000 +#define EXYNOS5260_PA_CMU_KFC 0x10700000 +#define EXYNOS5260_PA_CMU_G2D 0x10A00000 +#define EXYNOS5260_PA_CMU_MIF 0x10CE0000 +#define EXYNOS5260_PA_CMU_MFC 0x11090000 +#define EXYNOS5260_PA_CMU_G3D 0x11830000 +#define EXYNOS5260_PA_CMU_FSYS 0x122E0000 +#define EXYNOS5260_PA_CMU_AUD 0x128C0000 +#define EXYNOS5260_PA_CMU_ISP 0x133C0000 +#define EXYNOS5260_PA_CMU_GSCL 0x13F00000 +#define EXYNOS5260_PA_CMU_DISP 0x14550000 + #define EXYNOS_PA_CHIPID 0x10000000 #define EXYNOS4_PA_SYSCON 0x10010000 diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h index d36ad76..1c568d0 100644 --- a/arch/arm/mach-exynos/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos/include/mach/regs-clock.h @@ -365,6 +365,23 @@ /* Compatibility defines and inclusion */ + +/* For EXYNOS5260 */ +#define EXYNOS_CLKREG_TOP(x) (EXYNOS5260_VA_CMU_TOP + (x)) +#define EXYNOS_CLKREG_PERI(x) (EXYNOS5260_VA_CMU_PERI + (x)) +#define EXYNOS_CLKREG_EGL(x) (EXYNOS5260_VA_CMU_EGL + (x)) +#define EXYNOS_CLKREG_KFC(x) (EXYNOS5260_VA_CMU_KFC + (x)) +#define EXYNOS_CLKREG_G2D(x) (EXYNOS5260_VA_CMU_G2D + (x)) +#define EXYNOS_CLKREG_MIF(x) (EXYNOS5260_VA_CMU_MIF + (x)) +#define EXYNOS_CLKREG_MFC(x) (EXYNOS5260_VA_CMU_MFC + (x)) +#define EXYNOS_CLKREG_G3D(x) (EXYNOS5260_VA_CMU_G3D + (x)) +#define EXYNOS_CLKREG_FSYS(x) (EXYNOS5260_VA_CMU_FSYS + (x)) +#define EXYNOS_CLKREG_AUD(x) (EXYNOS5260_VA_CMU_AUD + (x)) +#define EXYNOS_CLKREG_ISP(x) (EXYNOS5260_VA_CMU_ISP + (x)) +#define EXYNOS_CLKREG_GSCL(x) (EXYNOS5260_VA_CMU_GSCL + (x)) +#define EXYNOS_CLKREG_DISP(x) (EXYNOS5260_VA_CMU_DISP + (x)) + + #include #define S5P_EPLL_CON EXYNOS4_EPLL_CON0 diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h index c2d7fcf..32966c8 100644 --- a/arch/arm/plat-samsung/include/plat/map-s5p.h +++ b/arch/arm/plat-samsung/include/plat/map-s5p.h @@ -72,6 +72,22 @@ #define EXYNOS5260_VA_SYS_GSCL S3C_ADDR(0x02870000) #define EXYNOS5260_VA_SYS_DISP S3C_ADDR(0x02874000) + +#define EXYNOS5260_VA_CMU_TOP (S5P_VA_CMU + (SZ_4K * 1)) +#define EXYNOS5260_VA_CMU_PERI (S5P_VA_CMU + (SZ_4K * 2)) +#define EXYNOS5260_VA_CMU_EGL (S5P_VA_CMU + (SZ_4K * 3)) +#define EXYNOS5260_VA_CMU_KFC (S5P_VA_CMU + (SZ_4K * 5)) +#define EXYNOS5260_VA_CMU_G2D (S5P_VA_CMU + (SZ_4K * 7)) +#define EXYNOS5260_VA_CMU_MIF (S5P_VA_CMU + (SZ_4K * 8)) +#define EXYNOS5260_VA_CMU_MFC (S5P_VA_CMU + (SZ_4K * 10)) +#define EXYNOS5260_VA_CMU_G3D (S5P_VA_CMU + (SZ_4K * 11)) +#define EXYNOS5260_VA_CMU_FSYS (S5P_VA_CMU + (SZ_4K * 13)) +#define EXYNOS5260_VA_CMU_AUD (S5P_VA_CMU + (SZ_4K * 14)) +#define EXYNOS5260_VA_CMU_ISP (S5P_VA_CMU + (SZ_4K * 15)) +#define EXYNOS5260_VA_CMU_GSCL (S5P_VA_CMU + (SZ_4K * 17)) +#define EXYNOS5260_VA_CMU_DISP (S5P_VA_CMU + (SZ_4K * 18)) + + #include #endif /* __ASM_PLAT_MAP_S5P_H */