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[209.132.180.67]) by mx.google.com with ESMTP id ck1si20248884pad.450.2014.05.01.03.46.30; Thu, 01 May 2014 03:46:30 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753701AbaEAKq3 (ORCPT + 9 others); Thu, 1 May 2014 06:46:29 -0400 Received: from mail-pa0-f52.google.com ([209.85.220.52]:41149 "EHLO mail-pa0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751807AbaEAKq3 (ORCPT ); Thu, 1 May 2014 06:46:29 -0400 Received: by mail-pa0-f52.google.com with SMTP id kx10so3483993pab.11 for ; Thu, 01 May 2014 03:46:28 -0700 (PDT) X-Received: by 10.66.66.66 with SMTP id d2mr19769046pat.36.1398941188775; Thu, 01 May 2014 03:46:28 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id vx10sm154176373pac.17.2014.05.01.03.46.25 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 01 May 2014 03:46:28 -0700 (PDT) From: Sachin Kamat To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, arnd@arndb.de, t.figa@samsung.com, kgene.kim@samsung.com, robh+dt@kernel.org, sachin.kamat@linaro.org Subject: [PATCH 2/2] Documentation: DT: Exynos: Bind SRAM though DT Date: Thu, 1 May 2014 16:14:45 +0530 Message-Id: <1398941085-10224-2-git-send-email-sachin.kamat@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398941085-10224-1-git-send-email-sachin.kamat@linaro.org> References: <1398941085-10224-1-git-send-email-sachin.kamat@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. 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Signed-off-by: Sachin Kamat --- .../devicetree/bindings/arm/exynos/smp-sram.txt | 38 ++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/exynos/smp-sram.txt diff --git a/Documentation/devicetree/bindings/arm/exynos/smp-sram.txt b/Documentation/devicetree/bindings/arm/exynos/smp-sram.txt new file mode 100644 index 000000000000..9969ca22b6af --- /dev/null +++ b/Documentation/devicetree/bindings/arm/exynos/smp-sram.txt @@ -0,0 +1,38 @@ +Samsung Exynos SRAM for SMP bringup: +------------------------------------ + +Samsung SMP-capable Exynos SoCs use part of the SRAM for the bringup +of the cores. Once the core gets powered up it executes the code +that is residing at some specific location of the SRAM. + +Therefore reserved section sub-nodes have to be added to the mmio-sram +declaration. These nodes are of two types depending upon secure or +non-secure execution environment. + +Required sub-node properties: +- compatible : should be + "samsung,exynos4210-sram" : Secure SYSRAM + "samsung,exynos4210-sram-ns" : Non-secure SYSRAM + +The rest of the properties should follow the generic mmio-sram discription +found in ../../misc/sram.txt + +Example: + + sram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sram@0 { + compatible = "samsung,exynos4210-sram"; + reg = <0x0 0x1000>; + }; + + smp-sram@53000 { + compatible = "samsung,exynos4210-sram-ns"; + reg = <0x53000 0x1000>; + }; + };