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[209.132.180.67]) by mx.google.com with ESMTP id x6si6981815igl.12.2015.09.18.07.22.31; Fri, 18 Sep 2015 07:22:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753407AbbIROWL (ORCPT + 4 others); Fri, 18 Sep 2015 10:22:11 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:20979 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752890AbbIROWF (ORCPT ); Fri, 18 Sep 2015 10:22:05 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NUV00168MKNOR60@mailout1.w1.samsung.com>; Fri, 18 Sep 2015 15:21:59 +0100 (BST) X-AuditID: cbfec7f5-f794b6d000001495-f2-55fc1e078824 Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id CF.00.05269.70E1CF55; Fri, 18 Sep 2015 15:21:59 +0100 (BST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NUV00KKZMJJ7I00@eusync4.samsung.com>; Fri, 18 Sep 2015 15:21:59 +0100 (BST) From: Andrzej Pietrasiewicz To: linux-samsung-soc@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Andrzej Pietrasiewicz , Jacek Anaszewski , Kukjin Kim , Marek Szyprowski , Bartlomiej Zolnierkiewicz , Mauro Carvalho Chehab , Krzysztof Kozlowski Subject: [PATCH 4/4] ARM64: dts: exynos5433: add jpeg node Date: Fri, 18 Sep 2015 16:21:00 +0200 Message-id: <1442586060-23657-5-git-send-email-andrzej.p@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1442586060-23657-1-git-send-email-andrzej.p@samsung.com> References: <1442586060-23657-1-git-send-email-andrzej.p@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrALMWRmVeSWpSXmKPExsVy+t/xa7rscn9CDdbv1bKY9bKdxWLjjPWs Fr1XnzNavH5haNH/+DWzxabH11gtejZsZbWYcX4fk8XaI3fZLVY/q3Dg8ti0qpPNY/OSeo8t /XfZPfq2rGL0+LxJLoA1issmJTUnsyy1SN8ugSvj1OGtLAVzuCv2L9jO0sD4l6OLkZNDQsBE Yu/69ywQtpjEhXvr2boYuTiEBJYyShz5OZEZwmlhkrjYshWsik3AWGLvwQ5GEFtEIEvi8PxZ zCA2s8ApJon1x+NAbGEBK4lLbbfYQWwWAVWJI8cmgtXzCrhKnJw2jRFim6JE97MJbCA2p4Cb xKEjp5lAbCGgms9XNzNOYORdwMiwilE0tTS5oDgpPddIrzgxt7g0L10vOT93EyMk3L7uYFx6 zOoQowAHoxIPr4fH71Ah1sSy4srcQ4wSHMxKIrxrbwCFeFMSK6tSi/Lji0pzUosPMUpzsCiJ 887c9T5ESCA9sSQ1OzW1ILUIJsvEwSnVwChl0PC2ZALr3SNzmmwSezZPsmq4I9DHfkik+9hJ raXXJop2cl2Nff7y0J7sr+1Lvl9lqp16eTcj2/6Y90zHDy8+pjhFaPPygsl8ER9KyiTzV/h+ COU9ucgh8u3dC8XvK2L0Gb1bbuVdWSYWN0ObUZHdgz3umE1Q+Onn/zxVTzG7u/r5l91yuKvE UpyRaKjFXFScCABMfYrcMwIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: andrzej.p@samsung.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Marek Szyprowski Add Exynos 5433 jpeg h/w codec node. Signed-off-by: Marek Szyprowski Signed-off-by: Andrzej Pietrasiewicz --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 59e21b6..5cb489f 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -916,6 +916,27 @@ io-channel-ranges; status = "disabled"; }; + jpeg: jpeg@15020000 { + compatible = "samsung,exynos5433-jpeg"; + reg = <0x15020000 0x10000>; + interrupts = <0 411 0>; + clock-names = "pclk", + "aclk", + "aclk_xiu", + "sclk"; + clocks = <&cmu_mscl CLK_PCLK_JPEG>, + <&cmu_mscl CLK_ACLK_JPEG>, + <&cmu_mscl CLK_ACLK_XIU_MSCLX>, + <&cmu_mscl CLK_SCLK_JPEG>; + assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, + <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, + <&cmu_mscl CLK_MOUT_SCLK_JPEG>, + <&cmu_top CLK_MOUT_SCLK_JPEG_A>; + assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>, + <&cmu_top CLK_SCLK_JPEG_MSCL>, + <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, + <&cmu_top CLK_MOUT_BUS_PLL_USER>; + }; }; timer {