From patchwork Wed Aug 31 13:25:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 75094 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp336696qga; Wed, 31 Aug 2016 06:25:33 -0700 (PDT) X-Received: by 10.98.77.70 with SMTP id a67mr16696284pfb.151.1472649933650; Wed, 31 Aug 2016 06:25:33 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id hb7si34591156pac.80.2016.08.31.06.25.33; Wed, 31 Aug 2016 06:25:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-samsung-soc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-samsung-soc-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759546AbcHaNZc (ORCPT + 4 others); Wed, 31 Aug 2016 09:25:32 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:50384 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754570AbcHaNZb (ORCPT ); Wed, 31 Aug 2016 09:25:31 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OCR00KB9ZYH6M10@mailout1.w1.samsung.com>; Wed, 31 Aug 2016 14:25:29 +0100 (BST) X-AuditID: cbfec7f4-f79cb6d000001359-48-57c6dac98fe4 Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 3D.75.04953.9CAD6C75; Wed, 31 Aug 2016 14:25:29 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OCR00GVUZYCHR60@eusync1.samsung.com>; Wed, 31 Aug 2016 14:25:28 +0100 (BST) From: Marek Szyprowski To: linux-media@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski Subject: [PATCH 1/3] media: exynos4-is: Add support for all required clocks Date: Wed, 31 Aug 2016 15:25:16 +0200 Message-id: <1472649918-10371-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1472649918-10371-1-git-send-email-m.szyprowski@samsung.com> References: <1472649918-10371-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFJMWRmVeSWpSXmKPExsVy+t/xy7onbx0LN9g9l8ni9QtDi54NW1kt Zpzfx2Sx9shddovDb9pZHVg9+rasYvT4vEkugCmKyyYlNSezLLVI3y6BK2PbmXcsBR2iFf0n prE3ML4X7GLk5JAQMJHYu2EGE4QtJnHh3no2EFtIYCmjxJz5uV2MXEB2E5PE8TVfwYrYBAwl ut52gRWJCDhJLJz1lx2kiFmgn1Hi4/sr7CAJYQFvibZf28CKWARUJd5cn8oIYvMKeEg8uL+D GWKbnMTJY5NZQWxOAU+J6TfnsEJs9pDY3PCHZQIj7wJGhlWMoqmlyQXFSem5hnrFibnFpXnp esn5uZsYISHyZQfj4mNWhxgFOBiVeHgzZhwNF2JNLCuuzD3EKMHBrCTCO+3msXAh3pTEyqrU ovz4otKc1OJDjNIcLErivHN3vQ8REkhPLEnNTk0tSC2CyTJxcEo1MM5QCLn01Ug0QfFEXifL pQLth1KrdNaLf5KOU7RUMmpvrGfv4T7zd07/zR8lTOcmrlPoWl2mEHSE+4T7kh/fbsQW3eKJ 17x2OdCVteLNU9X3J+3aT2y9YXTuSopU4p9P8rXJ57NYr+pKne0ImFpeLRywf0OfvjJL/hJL IeZXJgyXSm2uKl6apcRSnJFoqMVcVJwIAFdYtqQNAgAA Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds 3 more clocks to Exynos4 ISP driver. Enabling them is needed to make the hardware operational. Till now it worked only because those clocks were registered with IGNORE_UNUSED flag and were enabled by default after SoC reset. Signed-off-by: Marek Szyprowski --- Documentation/devicetree/bindings/media/exynos4-fimc-is.txt | 7 ++++--- drivers/media/platform/exynos4-is/fimc-is.c | 3 +++ drivers/media/platform/exynos4-is/fimc-is.h | 3 +++ 3 files changed, 10 insertions(+), 3 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt b/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt index 55c9ad6f9599..32ced99d4244 100644 --- a/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt +++ b/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt @@ -16,9 +16,10 @@ Required properties: - clocks : list of clock specifiers, corresponding to entries in clock-names property; - clock-names : must contain "ppmuispx", "ppmuispx", "lite0", "lite1" - "mpll", "sysreg", "isp", "drc", "fd", "mcuisp", "uart", - "ispdiv0", "ispdiv1", "mcuispdiv0", "mcuispdiv1", "aclk200", - "div_aclk200", "aclk400mcuisp", "div_aclk400mcuisp" entries, + "mpll", "sysreg", "isp", "drc", "fd", "mcuisp", "gicisp", + "pwm_isp", "mcuctl_isp", "uart", "ispdiv0", "ispdiv1", + "mcuispdiv0", "mcuispdiv1", "aclk200", "div_aclk200", + "aclk400mcuisp", "div_aclk400mcuisp" entries, matching entries in the clocks property. pmu subnode ----------- diff --git a/drivers/media/platform/exynos4-is/fimc-is.c b/drivers/media/platform/exynos4-is/fimc-is.c index 32ca55f16677..5cedf2322bb4 100644 --- a/drivers/media/platform/exynos4-is/fimc-is.c +++ b/drivers/media/platform/exynos4-is/fimc-is.c @@ -52,6 +52,9 @@ static char *fimc_is_clocks[ISS_CLKS_MAX] = { [ISS_CLK_DRC] = "drc", [ISS_CLK_FD] = "fd", [ISS_CLK_MCUISP] = "mcuisp", + [ISS_CLK_GICISP] = "gicisp", + [ISS_CLK_PWM_ISP] = "pwm_isp", + [ISS_CLK_MCUCTL_ISP] = "mcuctl_isp", [ISS_CLK_UART] = "uart", [ISS_CLK_ISP_DIV0] = "ispdiv0", [ISS_CLK_ISP_DIV1] = "ispdiv1", diff --git a/drivers/media/platform/exynos4-is/fimc-is.h b/drivers/media/platform/exynos4-is/fimc-is.h index 3a82c6a214c7..ee05da034aa1 100644 --- a/drivers/media/platform/exynos4-is/fimc-is.h +++ b/drivers/media/platform/exynos4-is/fimc-is.h @@ -77,6 +77,9 @@ enum { ISS_CLK_DRC, ISS_CLK_FD, ISS_CLK_MCUISP, + ISS_CLK_GICISP, + ISS_CLK_PWM_ISP, + ISS_CLK_MCUCTL_ISP, ISS_CLK_UART, ISS_GATE_CLKS_MAX, ISS_CLK_ISP_DIV0 = ISS_GATE_CLKS_MAX,