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Wed, 16 Nov 2016 13:11:37 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Seung-Woo Kim , Chanwoo Choi Subject: [PATCH 1/3] arm64: dts: exynos: TM2 - add support for GScaler devices Date: Wed, 16 Nov 2016 14:11:27 +0100 Message-id: <1479301889-11393-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1479301889-11393-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNIsWRmVeSWpSXmKPExsWy7djP87pc0ToRBmvW81psnLGe1eL6l+es FufPb2C3mHF+H5PF2iN32S0Ov2lntZgx+SWbA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CV0dXQwlRwVL7i9pstjA2MNyS6GDk5JARMJCa3rWeHsMUkLtxbz9bFyMUhJLCUUeLZ 3dlsIAkhgc+MEk9XasA0NH96zAwRX8YocaqzGMJuYJLYMNcSxGYTMJToetsF1isioCrxuW0B O8hQZoFeJoktd24AJTg4hAUCJD5/sQGpYQGqWX7pBSOIzSvgIfHh5DImiF1yEiePTWYFsTkF PCU+dDwBmyMh8JhN4tX1b0wgcyQEZCU2HWCGqHeRmH5iKdQzwhKvjm+BsmUkOjsOQs3sZ5Ro atWGsGcwSpx7ywthW0scPn4RbBezAJ/EpG3TmSHG80p0tAlBlHhIrNz+jhHCdpSY9PA/O8Tr cxgl+j6qTGCUWcDIsIpRJLW0ODc9tdhUrzgxt7g0L10vOT93EyMwSk//O/51B+PSY1aHGAU4 GJV4eBeoa0cIsSaWFVfmHmKU4GBWEuGti9CJEOJNSaysSi3Kjy8qzUktPsQozcGiJM67Z8GV cCGB9MSS1OzU1ILUIpgsEwenVAPjvDVWEqHcAdx7kjz7JARPif23dWfV45E942Fypl72XH6V wf0fJieqz99qYbtvnDbn2MEmoZBYXs5lsR7+h0KaJbpjufwdktS3cLp/MFmwpcbk5bbZxy/O Dq73m89yvOlt2KVjuqvMzj7v2ztDqHAWn6J78M4qU/ZNlYzsSWqFFjvasguMLymxFGckGmox FxUnAgBAQpmWzgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrHLMWRmVeSWpSXmKPExsVy+t/xK7r80ToRBkvOq1hsnLGe1eL6l+es FufPb2C3mHF+H5PF2iN32S0Ov2lntZgx+SWbA7vHplWdbB59W1YxenzeJBfAHOVmk5GamJJa pJCal5yfkpmXbqsUGuKma6GkkJeYm2qrFKHrGxKkpFCWmFMK5BkZoAEH5wD3YCV9uwS3jK6G FqaCo/IVt99sYWxgvCHRxcjJISFgItH86TEzhC0mceHeejYQW0hgCaNE5zLXLkYuILuJSaL1 /x0WkASbgKFE19susCIRAVWJz20L2EGKmAX6mSTOzN7CCJIQFvCT2LTkDJjNAlS0/NILMJtX wEPiw8llTBDb5CROHpvMCmJzCnhKfOh4AjSIA2ibh8SifXYTGHkXMDKsYhRJLS3OTc8tNtQr TswtLs1L10vOz93ECAzbbcd+bt7BeGlj8CFGAQ5GJR7eBeraEUKsiWXFlbmHGCU4mJVEeOsi dCKEeFMSK6tSi/Lji0pzUosPMZoC3TSRWUo0OR8YU3kl8YYmhuaWhkbGFhbmRkZK4rwlH66E CwmkJ5akZqemFqQWwfQxcXBKNTDWK9s1frRWNZxur/lUOCDkbOzD6qawjO5ZUQx5D99oNNYu 5pz4iDlvatQknsMyj3Y9ecD1r/rHJ2cn3w+bjBaExb/49j7RTrwmJkJ4+0ylWtv9a468K572 adrCTi8NrU9NhtLOil96tnzNK5p2cuXW5ZnXH21cLTtjyoSJGz1Mg6axdEtz+NkpsRRnJBpq MRcVJwIA4p9zS3ECAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20161116131137eucas1p198803f55c69c10f95031b54d878c72d3 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20161116131137eucas1p198803f55c69c10f95031b54d878c72d3 X-RootMTR: 20161116131137eucas1p198803f55c69c10f95031b54d878c72d3 References: <1479301889-11393-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds device nodes for GScaler devices to Exynos 5433 SoC dtsi and proper initial clock configuration to TM2 dts. Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 7 +++ arch/arm64/boot/dts/exynos/exynos5433.dtsi | 81 +++++++++++++++++++++++++++ 2 files changed, 88 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts index 5ab1028..5ff5c30 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts @@ -909,6 +909,13 @@ assigned-clock-rates = <0>, <0>, <0>, <0>, <66700000>; }; +&cmu_gscl { + assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, + <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; + assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, + <&cmu_top CLK_ACLK_GSCL_333>; +}; + &spi_1 { cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; status = "okay"; diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index ab29352..8ecde41 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -26,6 +26,12 @@ interrupt-parent = <&gic>; + aliases { + gsc0 = &gsc_0; + gsc1 = &gsc_1; + gsc2 = &gsc_2; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -798,6 +804,51 @@ reg = <0x145f0000 0x1038>; }; + gsc_0: video-scaler@13C00000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c00000 0x1000>; + interrupts = ; + clocks = <&cmu_gscl CLK_PCLK_GSCL0>, + <&cmu_gscl CLK_ACLK_GSCL0>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + clock-names = "pclk", + "aclk", + "aclk_xiu", + "aclk_gsclbend"; + iommus = <&sysmmu_gscl0>; + }; + + gsc_1: video-scaler@13C10000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c10000 0x1000>; + interrupts = ; + clocks = <&cmu_gscl CLK_PCLK_GSCL1>, + <&cmu_gscl CLK_ACLK_GSCL1>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + clock-names = "pclk", + "aclk", + "aclk_xiu", + "aclk_gsclbend"; + iommus = <&sysmmu_gscl1>; + }; + + gsc_2: video-scaler@13C20000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c20000 0x1000>; + interrupts = ; + clocks = <&cmu_gscl CLK_PCLK_GSCL2>, + <&cmu_gscl CLK_ACLK_GSCL2>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + clock-names = "pclk", + "aclk", + "aclk_xiu", + "aclk_gsclbend"; + iommus = <&sysmmu_gscl2>; + }; + sysmmu_decon0x: sysmmu@0x13a00000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13a00000 0x1000>; @@ -818,6 +869,36 @@ #iommu-cells = <0>; }; + sysmmu_gscl0: sysmmu@0x13C80000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13C80000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL0>; + #iommu-cells = <0>; + }; + + sysmmu_gscl1: sysmmu@0x13C90000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13C90000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL1>; + #iommu-cells = <0>; + }; + + sysmmu_gscl2: sysmmu@0x13CA0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13CA0000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL2>; + #iommu-cells = <0>; + }; + serial_0: serial@14c10000 { compatible = "samsung,exynos5433-uart"; reg = <0x14c10000 0x100>;