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Thu, 17 Nov 2016 08:51:06 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Seung-Woo Kim , Chanwoo Choi Subject: [PATCH 1/2] clk/samsung: exynos5433: Fix parent clocks for FSYS block Date: Thu, 17 Nov 2016 09:50:47 +0100 Message-id: <1479372648-11242-1-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrEIsWRmVeSWpSXmKPExsWy7djPc7o1+boRBsdXs1psnLGe1eL6l+es FufPb2C3mHF+H5PF2iN32S0Ov2lntZgx+SWbA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CVMbnlHGPBIaGKpR9+szQwbuHvYuTkkBAwkTiwZgoThC0mceHeerYuRi4OIYFljBI3 V11jgnA+M0q0XtrA0sXIAdaxerohXNGE709YIJwGJolva16zgYxiEzCU6HrbBWaLCKhKfG5b wA5SxCzQyySx5c4NsISwQIDEkdePwWwWoKLDh9vAbF4BD4k9p+6yQtwkJ3Hy2GRWkGYJgTNs EtPvfmGFOENWYtMBZogaF4k1OxZD/SAs8er4FnYIW0bi8uRuFgi7n1GiqVUbwp7BKHHuLS+E bS1x+PhFsF3MAnwSk7ZNZ4YYzyvR0SYEUeIhMW3tD0YI21Hi1u13YKuEBGIlbuy6wDaBUXoB I8MqRpHU0uLc9NRiQ73ixNzi0rx0veT83E2MwJg8/e/4+x2MT5tDDjEKcDAq8fBKFOlECLEm lhVX5h5ilOBgVhLhbcvUjRDiTUmsrEotyo8vKs1JLT7EKM3BoiTOu3fBlXAhgfTEktTs1NSC 1CKYLBMHp1QD4+Zn7S83XVVheHx81QS9x/XHkmqSlUtrffozdkjGTnt1NpaVXfpNdvbmm+cD //ldmD77zQ7pCY+UH705q9Ub7OQW+krnvGHpYY5g147r+yIEpVYwfGFa5en1bsp5LSubbR7q 9nMrutwy/W4sOl2794r7CYn3jMpHOzZfmz2pX2ndZZVf3OaC/UosxRmJhlrMRcWJAE7EvTHF AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrGLMWRmVeSWpSXmKPExsVy+t/xK7oJ+boRBhf2cFpsnLGe1eL6l+es FufPb2C3mHF+H5PF2iN32S0Ov2lntZgx+SWbA7vHplWdbB59W1YxenzeJBfAHOVmk5GamJJa pJCal5yfkpmXbqsUGuKma6GkkJeYm2qrFKHrGxKkpFCWmFMK5BkZoAEH5wD3YCV9uwS3jMkt 5xgLDglVLP3wm6WBcQt/FyMHh4SAicTq6YZdjJxAppjEhXvr2boYuTiEBJYwSkzaeZMVJCEk 0MQksa1HF8RmEzCU6HrbxQZiiwioSnxuW8AO0sAs0M8kcWb2FkaQhLCAn8S2xtNgzSxARYcP t4E18Ap4SOw5dZcVYpucxMljk1knMHIvYGRYxSiSWlqcm55bbKRXnJhbXJqXrpecn7uJERiG 24793LKDsetd8CFGAQ5GJR7eA/k6EUKsiWXFlbmHGCU4mJVEeNsydSOEeFMSK6tSi/Lji0pz UosPMZoCLZ/ILCWanA+MkbySeEMTQ3NLQyNjCwtzIyMlcd6pH66ECwmkJ5akZqemFqQWwfQx cXBKNTCuKVz3q/a7273iVutjb+9l8H3h266TpHLT7VGBoARfUuK3qLhfL++cKWO4n7Zmb7KX zC3dgkclJ3j79F5Iq9jnV7/5srHtQtdM3mnpqV5hKcniOS/VwnMvbtUO4nhnVLCiNKRLKmVf o4XcGe/jIcb3j9+7y/HZUv3iIyH+j5Muv+18tU1ArluJpTgj0VCLuag4EQDdS/IuWQIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20161117085106eucas1p1db7f6fb1e955257c607785ee76536b18 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20161117085106eucas1p1db7f6fb1e955257c607785ee76536b18 X-RootMTR: 20161117085106eucas1p1db7f6fb1e955257c607785ee76536b18 References: Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The proper parent clock for FSYS block is "aclk_fsys_200" according to the Exynos5433 reference manual. Signed-off-by: Marek Szyprowski --- Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 6 +++--- drivers/clk/samsung/clk-exynos5433.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Chanwoo Choi diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 63379b04e052..ffff67a0e9cd 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -79,7 +79,7 @@ Required Properties: Input clocks for fsys clock controller: - oscclk - sclk_ufs_mphy - - div_aclk_fsys_200 + - aclk_fsys_200 - sclk_pcie_100_fsys - sclk_ufsunipro_fsys - sclk_mmc2_fsys @@ -235,7 +235,7 @@ Example 2: Examples of clock controller nodes are listed below. clock-names = "oscclk", "sclk_ufs_mphy", - "div_aclk_fsys_200", + "aclk_fsys_200", "sclk_pcie_100_fsys", "sclk_ufsunipro_fsys", "sclk_mmc2_fsys", @@ -245,7 +245,7 @@ Example 2: Examples of clock controller nodes are listed below. "sclk_usbdrd30_fsys"; clocks = <&xxti>, <&cmu_cpif CLK_SCLK_UFS_MPHY>, - <&cmu_top CLK_DIV_ACLK_FSYS_200>, + <&cmu_top CLK_ACLK_FSYS_200>, <&cmu_top CLK_SCLK_PCIE_100_FSYS>, <&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>, <&cmu_top CLK_SCLK_MMC2_FSYS>, diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index cdf6ba3e5577..218a94f90e37 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -1934,7 +1934,7 @@ static void __init exynos5433_cmu_peris_init(struct device_node *np) /* list of all parent clock list */ PNAME(mout_sclk_ufs_mphy_user_p) = { "oscclk", "sclk_ufs_mphy", }; -PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "div_aclk_fsys_200", }; +PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "aclk_fsys_200", }; PNAME(mout_sclk_pcie_100_user_p) = { "oscclk", "sclk_pcie_100_fsys",}; PNAME(mout_sclk_ufsunipro_user_p) = { "oscclk", "sclk_ufsunipro_fsys",}; PNAME(mout_sclk_mmc2_user_p) = { "oscclk", "sclk_mmc2_fsys", };