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Thu, 17 Nov 2016 09:02:07 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Seung-Woo Kim , Chanwoo Choi Subject: [PATCH v2 1/3] arm64: dts: exynos: TM2 - add support for GScaler devices Date: Thu, 17 Nov 2016 10:01:55 +0100 Message-id: <1479373317-11711-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1479373317-11711-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNIsWRmVeSWpSXmKPExsWy7djP87oCRboRBjd+y1psnLGe1eL6l+es FufPb2C3mHF+H5PF2iN32S0Ov2lntZgx+SWbA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CVMeXMaqaC+/IVDYsWMDYw7pHsYuTkkBAwkTixuJsJwhaTuHBvPRuILSSwlFHi8A6J LkYuIPszo8SVy49Yuxg5wBp+r9GGiC9jlNh9tosVwmlgkjh+fxPYJDYBQ4mut11gk0QEVCU+ ty1gByliFuhlkthy5wZYQlggWKLz+30WEJsFqOjWqWlMIBt4BTwk1p8XhbhITuLkscmsIDan gKfElQOrWSHiz9kkpsznhzhIVmLTAWaIsIvE359boUqEJV4d38IOYctIdHYchHqyn1GiqVUb wp7BKHHuLS+EbS1x+PhFsF5mAT6JSdumM0OM55XoaBOCMD0k5vdCHeYocfXfMmaIz+cwSkz6 coFxAqPMAkaGVYwiqaXFuempxUZ6xYm5xaV56XrJ+bmbGIFRevrf8Y87GN+fsDrEKMDBqMTD eyBfJ0KINbGsuDL3EKMEB7OSCG9bpm6EEG9KYmVValF+fFFpTmrxIUZpDhYlcd49C66ECwmk J5akZqemFqQWwWSZODilGhjPrKjc8HoqxyWfd6bMn/j0D6YdmPr3/iGJPxNcK4+kXnE9KGGs IL/LcpeArKv+PDM1vdS//hM3nbaPv3dPXfX6hcnetrsa4ixnrbdPDvrxolNxMX/prfsv5ULW tGy+O/tP3gH19XbX2A2ms5yfaf5DUXaV82oW2dWunm2W/ha/Tb9EWF6RiGVUYinOSDTUYi4q TgQAFikcHM4CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLLMWRmVeSWpSXmKPExsVy+t/xK7piRboRBm+7pS02zljPanH9y3NW i/PnN7BbzDi/j8li7ZG77BaH37SzWsyY/JLNgd1j06pONo++LasYPT5vkgtgjnKzyUhNTEkt UkjNS85PycxLt1UKDXHTtVBSyEvMTbVVitD1DQlSUihLzCkF8owM0ICDc4B7sJK+XYJbxpQz q5kK7stXNCxawNjAuEeyi5GDQ0LAROL3Gu0uRk4gU0ziwr31bF2MXBxCAksYJSYu+80E4TQx Say78ZMZpIpNwFCi620XG4gtIqAq8bltATtIEbNAP5PEmdlbGEESwgLBEp3f77OA2CxARbdO TWMC2cYr4CGx/rwoxDY5iZPHJrOC2JwCnhJXDqxmBSkRAiqZuS9uAiPvAkaGVYwiqaXFuem5 xYZ6xYm5xaV56XrJ+bmbGIFBu+3Yz807GC9tDD7EKMDBqMTDK1GkEyHEmlhWXJl7iFGCg1lJ hLctUzdCiDclsbIqtSg/vqg0J7X4EKMp0EkTmaVEk/OBEZVXEm9oYmhuaWhkbGFhbmSkJM5b 8uFKuJBAemJJanZqakFqEUwfEwenVANj4ftab7lrDg9LL3gd+pZr25yfPv/MO9nVC6zy9b5W WXSkcXOwe/85pzGz/u2vZzLq04UeiDRYvokU/MKVNOOv4Iv0Gfd/tLOkbgxWqG/f3HNy7ZGk v++V2DJyHbuZiv7VLtqS8orruofFwZlfJn+X79jQsEmUmaco6OLP82qLGT5HfYtu/9SsxFKc kWioxVxUnAgAJvjI5nACAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20161117090207eucas1p2d01763d592faff079342b2aca27e30ad X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20161117090207eucas1p2d01763d592faff079342b2aca27e30ad X-RootMTR: 20161117090207eucas1p2d01763d592faff079342b2aca27e30ad References: <1479373317-11711-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds device nodes for GScaler devices to Exynos5433 SoC dtsi and proper initial clock configuration to TM2 dts. Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 10 ++++ arch/arm64/boot/dts/exynos/exynos5433.dtsi | 69 +++++++++++++++++++++++++++ 2 files changed, 79 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts index 48da2095e381..15436d30268f 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts @@ -30,6 +30,9 @@ model_info-hw_rev_end = <7>; aliases { + gsc0 = &gsc_0; + gsc1 = &gsc_1; + gsc2 = &gsc_2; pinctrl0 = &pinctrl_alive; pinctrl1 = &pinctrl_aud; pinctrl2 = &pinctrl_cpif; @@ -193,6 +196,13 @@ <66700000>, <66700000>; }; +&cmu_gscl { + assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, + <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; + assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, + <&cmu_top CLK_ACLK_GSCL_333>; +}; + &cpu0 { cpu-supply = <&buck3_reg>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index ab2935253cca..956096f9d2e6 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -798,6 +798,45 @@ reg = <0x145f0000 0x1038>; }; + gsc_0: video-scaler@13C00000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c00000 0x1000>; + interrupts = ; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend"; + clocks = <&cmu_gscl CLK_PCLK_GSCL0>, + <&cmu_gscl CLK_ACLK_GSCL0>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + iommus = <&sysmmu_gscl0>; + }; + + gsc_1: video-scaler@13C10000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c10000 0x1000>; + interrupts = ; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend"; + clocks = <&cmu_gscl CLK_PCLK_GSCL1>, + <&cmu_gscl CLK_ACLK_GSCL1>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + iommus = <&sysmmu_gscl1>; + }; + + gsc_2: video-scaler@13C20000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c20000 0x1000>; + interrupts = ; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend"; + clocks = <&cmu_gscl CLK_PCLK_GSCL2>, + <&cmu_gscl CLK_ACLK_GSCL2>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + iommus = <&sysmmu_gscl2>; + }; + sysmmu_decon0x: sysmmu@0x13a00000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13a00000 0x1000>; @@ -818,6 +857,36 @@ #iommu-cells = <0>; }; + sysmmu_gscl0: sysmmu@0x13C80000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13C80000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL0>; + #iommu-cells = <0>; + }; + + sysmmu_gscl1: sysmmu@0x13C90000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13C90000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL1>; + #iommu-cells = <0>; + }; + + sysmmu_gscl2: sysmmu@0x13CA0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13CA0000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL2>; + #iommu-cells = <0>; + }; + serial_0: serial@14c10000 { compatible = "samsung,exynos5433-uart"; reg = <0x14c10000 0x100>;