| Message ID | 20220120192438.25555-4-alim.akhtar@samsung.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/3] spi: dt-bindings: samsung: Add fsd spi compatible | expand |
Thanks Andi for review >-----Original Message----- >From: Andi Shyti [mailto:andi@etezian.org] >Sent: Saturday, January 22, 2022 4:13 PM >To: Alim Akhtar <alim.akhtar@samsung.com> >Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; >devicetree@vger.kernel.org; linus.walleij@linaro.org; robh+dt@kernel.org; >krzysztof.kozlowski@canonical.com; linux-samsung-soc@vger.kernel.org; >pankaj.dubey@samsung.com; broonie@kernel.org; andi@etezian.org; linux- >spi@vger.kernel.org; Aswani Reddy <aswani.reddy@samsung.com>; linux- >fsd@tesla.com >Subject: Re: [PATCH v2 3/3] arm64: dts: fsd: Add SPI device nodes > >Hi Alim and Aswani, > >On Fri, Jan 21, 2022 at 12:54:38AM +0530, Alim Akhtar wrote: >> From: Aswani Reddy <aswani.reddy@samsung.com> >> >> Adds device tree node for SPI IPs >> >> Cc: linux-fsd@tesla.com >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> >> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> > >Reviewed-by: Andi Shyti <andi@etezian.org> > >Please, also allow me another nit-commnent for the next patches: >the tag section is in chronological order. I suppose that first Aswani wrote the >patch, then you sent it to the mailing list and at the end Krzysztof has >reviewed it, this means that the right order is: > > Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> > Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > Sure, will update it in the next version of the patch set. >Thank you, >Andi
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index bab63c9f79dc..86cf1446d1fc 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -29,6 +29,9 @@ aliases { pinctrl0 = &pinctrl_fsys0; pinctrl1 = &pinctrl_peric; pinctrl2 = &pinctrl_pmu; + spi0 = &spi_0; + spi1 = &spi_1; + spi2 = &spi_2; }; cpus { @@ -667,6 +670,60 @@ pinctrl_fsys0: pinctrl@15020000 { reg = <0x0 0x15020000 0x0 0x1000>; interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; }; + + spi_0: spi@14140000 { + compatible = "tesla,fsd-spi"; + reg = <0x0 0x14140000 0x0 0x100>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 4>, <&pdma1 5>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock_peric PERIC_PCLK_SPI0>, + <&clock_peric PERIC_SCLK_SPI0>; + clock-names = "spi", "spi_busclk0"; + samsung,spi-src-clk = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_bus>; + num-cs = <1>; + status = "disabled"; + }; + + spi_1: spi@14150000 { + compatible = "tesla,fsd-spi"; + reg = <0x0 0x14150000 0x0 0x100>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 6>, <&pdma1 7>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock_peric PERIC_PCLK_SPI1>, + <&clock_peric PERIC_SCLK_SPI1>; + clock-names = "spi", "spi_busclk0"; + samsung,spi-src-clk = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus>; + num-cs = <1>; + status = "disabled"; + }; + + spi_2: spi@14160000 { + compatible = "tesla,fsd-spi"; + reg = <0x0 0x14160000 0x0 0x100>; + interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 8>, <&pdma1 9>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock_peric PERIC_PCLK_SPI2>, + <&clock_peric PERIC_SCLK_SPI2>; + clock-names = "spi", "spi_busclk0"; + samsung,spi-src-clk = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_bus>; + num-cs = <1>; + status = "disabled"; + }; }; };