From patchwork Wed Jul 20 15:52:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 593229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67895CCA480 for ; Wed, 20 Jul 2022 15:54:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229456AbiGTPyG (ORCPT ); Wed, 20 Jul 2022 11:54:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232553AbiGTPyE (ORCPT ); Wed, 20 Jul 2022 11:54:04 -0400 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C120B4C627 for ; Wed, 20 Jul 2022 08:54:03 -0700 (PDT) Received: by mail-pj1-x1032.google.com with SMTP id pc13so1144602pjb.4 for ; Wed, 20 Jul 2022 08:54:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=X6jxRQ9Oop0f01LfNyCcXEkFGJrvZaC01iuAVK7jrGE=; b=Kvepmg+8gfLb9h4wngqSZ/l3IJFRZfWuKsbiIwYgXc+d5H3cSK3+vxuwXwYPJvRcBP BwbmU+yPwIIqAAIAS2CiJtj7sSJs+g/u6gvhZ5GI3lJmHE0ZXHo0ozVZjpVoHYW9IUwa uZgdC1MKZ6/X9vGmMdhEtOfU6IHEmP/uKn9cY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=X6jxRQ9Oop0f01LfNyCcXEkFGJrvZaC01iuAVK7jrGE=; b=pvVBO7iNTR2wpfvdvzkhOG5RJgftCdG0MJn9EWuImphnffaNwK0JWiV6879B7ycRnS F0KPUztwE6vxefUAPzYzGI4BCimPGSFqnbvofSQFtbUB50XRrhGst93AZOQGxRF4XYG0 nAfqG12n+Yf4klgI5B0XFTvGC14kpGpFbGhsHnkiuZdTWTT9B3A8tGD4kucyQZykXamx NHlXlDFnQK5sD99UqAwAHDQk/6qxG1q0yGsyS+OSAlVcnj/m7AZV01k6y7uVCCRiB2EM rtFkYViO9ipVaO/1KjsQD10hBl25t2+obYPEkS0yXUnOcwbJzpJ3JQE+4au4Yu/JolrF 5HVA== X-Gm-Message-State: AJIora/wlw9s0exdru8zN6qJbf7XETFM4Qm4bQgFcve9HIiA+hrySJyr 9QrqwNnmFfecK9RrtFZbuhuXGw== X-Google-Smtp-Source: AGRyM1t1awHfi+gMFM9GmRgMsXqaxnj5Fs4l1OQDPqzIY6vvAaaw4r3/6XI1IXXHl3FjpkGisim9Xw== X-Received: by 2002:a17:903:11c9:b0:16b:8293:c599 with SMTP id q9-20020a17090311c900b0016b8293c599mr38384479plh.136.1658332443279; Wed, 20 Jul 2022 08:54:03 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a073:d177:d5:aee:4f03]) by smtp.gmail.com with ESMTPSA id a8-20020a170902710800b0015e8d4eb1d7sm13919198pll.33.2022.07.20.08.53.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jul 2022 08:54:02 -0700 (PDT) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki , Laurent Pinchart Subject: [PATCH v3 13/13] drm: bridge: samsung-dsim: Add i.MX8MM support Date: Wed, 20 Jul 2022 21:22:10 +0530 Message-Id: <20220720155210.365977-14-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220720155210.365977-1-jagan@amarulasolutions.com> References: <20220720155210.365977-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Samsung MIPI DSIM master can also be found in i.MX8MM SoC. Add compatible and associated driver_data for it. v3: * enable DSIM_QUIRK_FIXUP_SYNC_POL quirk v2: * collect Laurent r-b v1: * none Reviewed-by: Laurent Pinchart Signed-off-by: Jagan Teki --- drivers/gpu/drm/bridge/samsung-dsim.c | 35 +++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index ef439b49f2b8..3b859b61f493 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -360,6 +360,24 @@ static const unsigned int exynos5433_reg_values[] = { [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0c), }; +static const unsigned int imx8mm_dsim_reg_values[] = { + [RESET_TYPE] = DSIM_SWRST, + [PLL_TIMER] = 500, + [STOP_STATE_CNT] = 0xf, + [PHYCTRL_ULPS_EXIT] = 0, + [PHYCTRL_VREG_LP] = 0, + [PHYCTRL_SLEW_UP] = 0, + [PHYTIMING_LPX] = DSIM_PHYTIMING_LPX(0x06), + [PHYTIMING_HS_EXIT] = DSIM_PHYTIMING_HS_EXIT(0x0b), + [PHYTIMING_CLK_PREPARE] = DSIM_PHYTIMING1_CLK_PREPARE(0x07), + [PHYTIMING_CLK_ZERO] = DSIM_PHYTIMING1_CLK_ZERO(0x26), + [PHYTIMING_CLK_POST] = DSIM_PHYTIMING1_CLK_POST(0x0d), + [PHYTIMING_CLK_TRAIL] = DSIM_PHYTIMING1_CLK_TRAIL(0x08), + [PHYTIMING_HS_PREPARE] = DSIM_PHYTIMING2_HS_PREPARE(0x08), + [PHYTIMING_HS_ZERO] = DSIM_PHYTIMING2_HS_ZERO(0x0d), + [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0b), +}; + static const struct samsung_dsim_driver_data exynos3_dsi_driver_data = { .reg_ofs = exynos_reg_ofs, .plltmr_reg = 0x50, @@ -426,6 +444,19 @@ static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { .quirks = DSIM_QUIRK_PLAT_DATA, }; +static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { + .reg_ofs = exynos5433_reg_ofs, + .plltmr_reg = 0xa0, + .has_clklane_stop = 1, + .num_clks = 2, + .max_freq = 2100, + .wait_for_reset = 0, + .num_bits_resol = 12, + .pll_p_offset = 14, + .reg_values = imx8mm_dsim_reg_values, + .quirks = DSIM_QUIRK_FIXUP_SYNC_POL, +}; + static const struct of_device_id samsung_dsim_of_match[] = { { .compatible = "samsung,exynos3250-mipi-dsi", @@ -447,6 +478,10 @@ static const struct of_device_id samsung_dsim_of_match[] = { .compatible = "samsung,exynos5433-mipi-dsi", .data = &exynos5433_dsi_driver_data }, + { + .compatible = "fsl,imx8mm-mipi-dsim", + .data = &imx8mm_dsi_driver_data + }, { /* sentinel. */ } };