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Otherwise, a SError happens when writing to UTXH (+0x20). This only manifested in earlycon as reg-io-width in the device tree is consulted for normal serial writes. Change the iotype of the port to UPIO_MEM32, to allow the serial port to function on A7-A11 SoCs. This change does not appear to affect Apple M1 and above. Signed-off-by: Nick Chan --- drivers/tty/serial/samsung_tty.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index c4f2ac9518aa..27b8a50bd3e7 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -2536,7 +2536,7 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = { .name = "Apple S5L UART", .type = TYPE_APPLE_S5L, .port_type = PORT_8250, - .iotype = UPIO_MEM, + .iotype = UPIO_MEM32, .fifosize = 16, .rx_fifomask = S3C2410_UFSTAT_RXMASK, .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, @@ -2825,8 +2825,10 @@ static int __init apple_s5l_early_console_setup(struct earlycon_device *device, /* Close enough to S3C2410 for earlycon... */ device->port.private_data = &s3c2410_early_console_data; + /* ... however, we need to change the port iotype */ + device->port.iotype = UPIO_MEM32; #ifdef CONFIG_ARM64 - /* ... but we need to override the existing fixmap entry as nGnRnE */ + /* ... and also override the existing fixmap entry as nGnRnE */ __set_fixmap(FIX_EARLYCON_MEM_BASE, device->port.mapbase, __pgprot(PROT_DEVICE_nGnRnE)); #endif