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AJvYcCX2y5Pf4yKDAxXDRoXiQDtp33d5ADjnW0Rgfxp6OkXEkn/7fMThh2tEXROx0H4lt28HCLPUCo5uZlXclY/K79thaA==@vger.kernel.org X-Gm-Message-State: AOJu0YxYz6UbywYZGOMDYGmFzjKCrA98J/WoIaGujAiPKoaMomjdFK6I J0jw3ckoPkwZhpTxn6Px1SbxcHIWozeOkB2qG1PHwAB4ISYGipWIURXb8xGKE0Q= X-Google-Smtp-Source: AGHT+IG93PjcVz+7+9Ks5a4tZOcJmfpGpRSJSrp4oHNgenqx8uAoLySbtv12lhSPEbntHZWJ76vNhQ== X-Received: by 2002:a05:600c:1d8f:b0:431:5bae:c600 with SMTP id 5b1f17b1804b1-4318c780d48mr50376755e9.34.1729862101341; Fri, 25 Oct 2024 06:15:01 -0700 (PDT) Received: from gpeter-l.lan ([145.224.67.228]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b58b6bdsm47616685e9.45.2024.10.25.06.14.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 06:15:00 -0700 (PDT) From: Peter Griffin To: alim.akhtar@samsung.com, James.Bottomley@HansenPartnership.com, martin.petersen@oracle.com, avri.altman@wdc.com, bvanassche@acm.org, krzk@kernel.org Cc: tudor.ambarus@linaro.org, andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, ebiggers@kernel.org, Peter Griffin Subject: [PATCH v2 09/11] scsi: ufs: exynos: set ACG to be controlled by UFS_ACG_DISABLE Date: Fri, 25 Oct 2024 14:14:40 +0100 Message-ID: <20241025131442.112862-10-peter.griffin@linaro.org> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241025131442.112862-1-peter.griffin@linaro.org> References: <20241025131442.112862-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 HCI_IOP_ACG_DISABLE is an undocumented register in the TRM but the downstream driver sets this register so we follow suit here. The register is already 0 presumed to be set by the bootloader as the comment downstream implies the reset state is 1. So whilst this is a nop currently, it should help with suspend/resume. Signed-off-by: Peter Griffin Reviewed-by: Tudor Ambarus --- drivers/ufs/host/ufs-exynos.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c index b0cbb147c7a1..fa4e61f152c4 100644 --- a/drivers/ufs/host/ufs-exynos.c +++ b/drivers/ufs/host/ufs-exynos.c @@ -76,6 +76,10 @@ #define CLK_CTRL_EN_MASK (REFCLK_CTRL_EN |\ UNIPRO_PCLK_CTRL_EN |\ UNIPRO_MCLK_CTRL_EN) + +#define HCI_IOP_ACG_DISABLE 0x100 +#define HCI_IOP_ACG_DISABLE_EN BIT(0) + /* Device fatal error */ #define DFES_ERR_EN BIT(31) #define DFES_DEF_L2_ERRS (UIC_DATA_LINK_LAYER_ERROR_RX_BUF_OF |\ @@ -220,10 +224,15 @@ static int exynos_ufs_shareability(struct exynos_ufs *ufs) static int gs101_ufs_drv_init(struct device *dev, struct exynos_ufs *ufs) { struct ufs_hba *hba = ufs->hba; + u32 reg; /* Enable WriteBooster */ hba->caps |= UFSHCD_CAP_WB_EN; + /* set ACG to be controlled by UFS_ACG_DISABLE */ + reg = hci_readl(ufs, HCI_IOP_ACG_DISABLE); + hci_writel(ufs, reg & (~HCI_IOP_ACG_DISABLE_EN), HCI_IOP_ACG_DISABLE); + return exynos_ufs_shareability(ufs); }