| Message ID | 20241118021009.2858849-4-sowon.na@samsung.com |
|---|---|
| State | New |
| Headers | show |
| Series | Support ExynosAutov920 ufs phy driver | expand |
> -----Original Message----- > From: Sowon Na <sowon.na@samsung.com> > Sent: Monday, November 18, 2024 7:40 AM > To: robh@kernel.org; krzk@kernel.org; conor+dt@kernel.org; > vkoul@kernel.org; alim.akhtar@samsung.com; kishon@kernel.org > Cc: krzk+dt@kernel.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org; > sowon.na@samsung.com > Subject: [PATCH v3 3/3] arm64: dts: exynosautov920: add ufs phy for > ExynosAutov920 SoC > > Add UFS Phy for ExynosAutov920 > > Like ExynosAutov9, this also uses fixed-rate clock nodes until clock driver has > been supported. The clock nodes are initialized on bootloader stage thus we > don't need to control them so far. > > Signed-off-by: Sowon Na <sowon.na@samsung.com> > --- Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Are you planning to send UFS HCI patches as well? > arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > index c759134c909e..505ba04722de 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > @@ -361,6 +361,17 @@ pinctrl_aud: pinctrl@1a460000 { > compatible = "samsung,exynosautov920-pinctrl"; > reg = <0x1a460000 0x10000>; > }; > + > + ufs_0_phy: phy@16e04000 { > + compatible = "samsung,exynosautov920-ufs-phy"; > + reg = <0x16e04000 0x4000>; > + reg-names = "phy-pma"; > + clocks = <&xtcxo>; > + clock-names = "ref_clk"; > + samsung,pmu-syscon = <&pmu_system_controller>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > }; > > timer { > -- > 2.45.2
Hi Alim, > -----Original Message----- > From: Alim Akhtar <alim.akhtar@samsung.com> > Sent: Wednesday, November 27, 2024 11:47 AM > To: 'Sowon Na' <sowon.na@samsung.com>; robh@kernel.org; krzk@kernel.org; > conor+dt@kernel.org; vkoul@kernel.org; kishon@kernel.org > Cc: krzk+dt@kernel.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org > Subject: RE: [PATCH v3 3/3] arm64: dts: exynosautov920: add ufs phy for > ExynosAutov920 SoC > > > > > -----Original Message----- > > From: Sowon Na <sowon.na@samsung.com> > > Sent: Monday, November 18, 2024 7:40 AM > > To: robh@kernel.org; krzk@kernel.org; conor+dt@kernel.org; > > vkoul@kernel.org; alim.akhtar@samsung.com; kishon@kernel.org > > Cc: krzk+dt@kernel.org; linux-kernel@vger.kernel.org; > > devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org; > > sowon.na@samsung.com > > Subject: [PATCH v3 3/3] arm64: dts: exynosautov920: add ufs phy for > > ExynosAutov920 SoC > > > > Add UFS Phy for ExynosAutov920 > > > > Like ExynosAutov9, this also uses fixed-rate clock nodes until clock > > driver has been supported. The clock nodes are initialized on > > bootloader stage thus we don't need to control them so far. > > > > Signed-off-by: Sowon Na <sowon.na@samsung.com> > > --- > Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> > > Are you planning to send UFS HCI patches as well? Yes, I will send UFS HCI patches for ExynosAutov920 after phy patches. Really thank you for your reviews. > > > arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > index c759134c909e..505ba04722de 100644 > > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > @@ -361,6 +361,17 @@ pinctrl_aud: pinctrl@1a460000 { > > compatible = "samsung,exynosautov920-pinctrl"; > > reg = <0x1a460000 0x10000>; > > }; > > + > > + ufs_0_phy: phy@16e04000 { > > + compatible = "samsung,exynosautov920-ufs-phy"; > > + reg = <0x16e04000 0x4000>; > > + reg-names = "phy-pma"; > > + clocks = <&xtcxo>; > > + clock-names = "ref_clk"; > > + samsung,pmu-syscon = <&pmu_system_controller>; > > + #phy-cells = <0>; > > + status = "disabled"; > > + }; > > }; > > > > timer { > > -- > > 2.45.2 >
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index c759134c909e..505ba04722de 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -361,6 +361,17 @@ pinctrl_aud: pinctrl@1a460000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x1a460000 0x10000>; }; + + ufs_0_phy: phy@16e04000 { + compatible = "samsung,exynosautov920-ufs-phy"; + reg = <0x16e04000 0x4000>; + reg-names = "phy-pma"; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + status = "disabled"; + }; }; timer {
Add UFS Phy for ExynosAutov920 Like ExynosAutov9, this also uses fixed-rate clock nodes until clock driver has been supported. The clock nodes are initialized on bootloader stage thus we don't need to control them so far. Signed-off-by: Sowon Na <sowon.na@samsung.com> --- arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)