| Message ID | 20250529112640.1646740-5-raghav.s@samsung.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add clock support for CMU_HSI2 | expand |
Hi Raghav > -----Original Message----- > From: Raghav Sharma <raghav.s@samsung.com> > Sent: Thursday, May 29, 2025 4:57 PM > To: krzk@kernel.org; s.nawrocki@samsung.com; cw00.choi@samsung.com; > alim.akhtar@samsung.com; mturquette@baylibre.com; sboyd@kernel.org; > robh@kernel.org; conor+dt@kernel.org; richardcochran@gmail.com; > sunyeal.hong@samsung.com; shin.son@samsung.com > Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; netdev@vger.kernel.org; > chandan.vn@samsung.com; karthik.sun@samsung.com; > dev.tailor@samsung.com; Raghav Sharma <raghav.s@samsung.com> > Subject: [PATCH v3 4/4] arm64: dts: exynosautov920: add CMU_HSI2 clock DT > nodes > > Add required dt node for CMU_HSI2 block, which provides clocks to ufs and > ethernet IPs > > Signed-off-by: Raghav Sharma <raghav.s@samsung.com> > --- Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> > arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 17 > +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > index 2cb8041c8a9f..7890373f5da0 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > @@ -1048,6 +1048,23 @@ pinctrl_hsi1: pinctrl@16450000 { > interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>; > }; > > + cmu_hsi2: clock-controller@16b00000 { > + compatible = "samsung,exynosautov920-cmu-hsi2"; > + reg = <0x16b00000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&xtcxo>, > + <&cmu_top DOUT_CLKCMU_HSI2_NOC>, > + <&cmu_top > DOUT_CLKCMU_HSI2_NOC_UFS>, > + <&cmu_top > DOUT_CLKCMU_HSI2_UFS_EMBD>, > + <&cmu_top > DOUT_CLKCMU_HSI2_ETHERNET>; > + clock-names = "oscclk", > + "noc", > + "ufs", > + "embd", > + "ethernet"; > + }; > + > pinctrl_hsi2: pinctrl@16c10000 { > compatible = "samsung,exynosautov920-pinctrl"; > reg = <0x16c10000 0x10000>; > -- > 2.34.1
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index 2cb8041c8a9f..7890373f5da0 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -1048,6 +1048,23 @@ pinctrl_hsi1: pinctrl@16450000 { interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>; }; + cmu_hsi2: clock-controller@16b00000 { + compatible = "samsung,exynosautov920-cmu-hsi2"; + reg = <0x16b00000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_HSI2_NOC>, + <&cmu_top DOUT_CLKCMU_HSI2_NOC_UFS>, + <&cmu_top DOUT_CLKCMU_HSI2_UFS_EMBD>, + <&cmu_top DOUT_CLKCMU_HSI2_ETHERNET>; + clock-names = "oscclk", + "noc", + "ufs", + "embd", + "ethernet"; + }; + pinctrl_hsi2: pinctrl@16c10000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x16c10000 0x10000>;
Add required dt node for CMU_HSI2 block, which provides clocks to ufs and ethernet IPs Signed-off-by: Raghav Sharma <raghav.s@samsung.com> --- arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)