From patchwork Wed Nov 9 19:41:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Asutosh Das X-Patchwork-Id: 623286 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97C5DC433FE for ; Wed, 9 Nov 2022 19:42:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231823AbiKITmZ (ORCPT ); Wed, 9 Nov 2022 14:42:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231818AbiKITmX (ORCPT ); Wed, 9 Nov 2022 14:42:23 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 979632CCB2; Wed, 9 Nov 2022 11:42:22 -0800 (PST) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2A9GEBeW027591; Wed, 9 Nov 2022 19:42:10 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=iU+F5f3S0/rtAFzzRYlGjPbAihXLF7zJpBtF2etbfs0=; b=VUHJU+yl5MFZzpq14V3aJEPix6YRflImrvuc77cf3scNQtjWtc0NT31gKaKPgvd0C6VU Qz2rSNTOEQHAy23aZdPH+lQ9Jd5LsA8TKzbVE+azt2UemSj5YnvkIcXSfnjWFQDYTch2 7xoIoGagUt3ef4NKNzYPFSCJoJFiLSVjbPdxm2rEjxgSa59luguEg8P/WUyOK2D50kl0 7YztP30s4vwvpJlkjtCo+3+yRWKxaJnZQBJ4O9f853NemNBTUvEqwBtdqqdNM3l1Qv9V NKyrgXhOHMsLuh+fJZGhBywFx5/jU8UVa62apUn+paD9CQ+KQJ19F6XNWeUbwpV36ZH7 aA== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3kr6b42a90-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 09 Nov 2022 19:42:09 +0000 Received: from nasanex01a.na.qualcomm.com ([10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2A9Jg9rb030040 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 9 Nov 2022 19:42:09 GMT Received: from asutoshd-linux1.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 9 Nov 2022 11:42:08 -0800 From: Asutosh Das To: , , CC: , , , , , , , , , Asutosh Das , Subject: [PATCH v4 00/16] Add Multi Circular Queue Support Date: Wed, 9 Nov 2022 11:41:25 -0800 Message-ID: X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: y7km4BzyXJ6HdUUpaauiNgxB5toUUGKR X-Proofpoint-ORIG-GUID: y7km4BzyXJ6HdUUpaauiNgxB5toUUGKR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-09_06,2022-11-09_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 phishscore=0 adultscore=0 spamscore=0 clxscore=1015 suspectscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211090148 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org UFS Multi-Circular Queue (MCQ) has been added in UFSHCI v4.0 to improve storage performance. The implementation uses the shared tagging mechanism so that tags are shared among the hardware queues. The number of hardware queues is configurable. This series doesn't include the ESI implementation for completion handling. This implementation has been verified by booting on a Qualcomm platform. During testing, all low power modes were disabled and it was in HS-G1 mode. Please take a look and let us know your thoughts. v3 -> v4: - Added a kernel module parameter to disable MCQ mode - Added Bart's reviewed-by tag for some patches - Addressed Bart's comments v2 -> v3: - Split ufshcd_config_mcq() into ufshcd_alloc_mcq() and ufshcd_config_mcq() - Use devm_kzalloc() in ufshcd_mcq_init() - Free memory and resource allocation on error paths - Corrected typos in code comments v1 -> v2: - Added a non MCQ related change to use a function to extrace ufs extended feature - Addressed Mani's comments - Addressed Bart's comments v1: - Split the changes - Addressed Bart's comments - Addressed Bean's comments * RFC versions: v2 -> v3: - Split the changes based on functionality - Addressed queue configuration issues - Faster SQE tail pointer increments - Addressed comments from Bart and Manivannan v1 -> v2: - Enabled host_tagset - Added queue num configuration support - Added one more vops to allow vendor provide the wanted MAC - Determine nutrs and can_queue by considering both MAC, bqueuedepth and EXT_IID support - Postponed MCQ initialization and scsi_add_host() to async probe - Used (EXT_IID, Task Tag) tuple to support up to 4096 tasks (theoretically) Asutosh Das (16): ufs: core: Optimize duplicate code to read extended feature ufs: core: Probe for ext_iid support ufs: core: Introduce Multi-circular queue capability ufs: core: Defer adding host to scsi if mcq is supported ufs: core: mcq: Add Multi Circular Queue support ufs: core: mcq: Configure resource regions ufs: core: mcq: Calculate queue depth ufs: core: mcq: Allocate memory for mcq mode ufs: core: mcq: Configure operation and runtime interface ufs: core: mcq: Use shared tags for MCQ mode ufs: core: Prepare ufshcd_send_command for mcq ufs: core: mcq: Find hardware queue to queue request ufs: core: Prepare for completion in mcq ufs: mcq: Add completion support of a cqe ufs: core: mcq: Add completion support in poll ufs: core: mcq: Enable Multi Circular Queue drivers/ufs/core/Makefile | 2 +- drivers/ufs/core/ufs-mcq.c | 494 +++++++++++++++++++++++++++++++++++++++++ drivers/ufs/core/ufshcd-priv.h | 84 ++++++- drivers/ufs/core/ufshcd.c | 381 +++++++++++++++++++++++++------ drivers/ufs/host/ufs-qcom.c | 48 ++++ drivers/ufs/host/ufs-qcom.h | 4 + include/ufs/ufs.h | 6 + include/ufs/ufshcd.h | 125 +++++++++++ include/ufs/ufshci.h | 63 ++++++ 9 files changed, 1140 insertions(+), 67 deletions(-) create mode 100644 drivers/ufs/core/ufs-mcq.c Reviewed-by: Bart Van Assche