From patchwork Sat Jun 8 05:04:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 166194 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp1460557ili; Fri, 7 Jun 2019 22:05:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqy68wYiFMlR8Ih0cssq8IOmaZT9CWtab5VEp3JCk+h5Uq9pcOuojcZiq9HcTvfIdrY9hDTu X-Received: by 2002:a63:c106:: with SMTP id w6mr6109504pgf.422.1559970303563; Fri, 07 Jun 2019 22:05:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559970303; cv=none; d=google.com; s=arc-20160816; b=Rw2rTFr4Om94eD5WtT+7A6rIz9z6O4tezpO/lehFCruF//a+6heuehGpAcJEP+FiJg 1ytkntxkue3/5i4DysPtIQdrtCWthmO79Ca/XxvFLOLmU5tW2X57CWzhiw6BhS1rcINi SSyRvVDJrqUj3slSF1Txm7DikcJpU1W230s8F49CsPA6Hi+H06guZ6IadxCI0ZELobyc r7uAyqBo41Gpm5RCspWgMBMqZGtZQkNS4IyB2ozqMBvNOImK2fYQpo66hyoNHUMUSoSQ 1hFqtxzPicQ/mVn6lci60/k3Yx4wIYc5FY4hcRhThz4hzweBYH2m5FQi2iV7iSyDu0Dr clDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=OPc6kbODFlIcyYEoeSG+YAdIIHdp3uyhG/4PAINTxrk=; b=Xyr9gkOIrj7H5r8nv9axVsyGW/rCpfJnAatx36lpGRK7cNSxsK0g2jZ3I+uHsfVBvZ oaocrlf57vMIutgTapZ2o6/75vyZ4K97LCoSSCrFCKUA4J4pqAGXp6bsWxTx6XPekNj1 y3UjOBBfWFXDYJlasuwvFU6JJU/ir/GD/r4gfV4QnvjeH6lNCb6YUnN4dg8AkFE10uOw qMTSA/Tmn+p4hJG33z10WbT0rc61jUxxF/Ao9HtgKXphLqo9VqhDndg8Hc8SDbaPV9Tw tRrld36yS0spNqecvdEhcRRKOoYNsUpZOu0nZYfs0ig6f1pM7hVru6SH4NVew4KFpZKU v4Tg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="ycYqj/ut"; spf=pass (google.com: best guess record for domain of linux-scsi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z28si233964pgk.319.2019.06.07.22.05.02; Fri, 07 Jun 2019 22:05:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-scsi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="ycYqj/ut"; spf=pass (google.com: best guess record for domain of linux-scsi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730348AbfFHFE5 (ORCPT + 1 other); Sat, 8 Jun 2019 01:04:57 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:41001 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730345AbfFHFE5 (ORCPT ); Sat, 8 Jun 2019 01:04:57 -0400 Received: by mail-pg1-f193.google.com with SMTP id 83so2193949pgg.8 for ; Fri, 07 Jun 2019 22:04:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OPc6kbODFlIcyYEoeSG+YAdIIHdp3uyhG/4PAINTxrk=; b=ycYqj/utDSDZvWqoen1KQCkERQbZq7Wr00tpnbsBfyP6prbsSZkHBefD9Y9t+aoDxm i5B9gAHqC5rcJEyawiczXqbik8FOdtyb5sYT5Wc8syNCVYfAM5dHuz4GpmMTYzlEwXU+ 7hm3iVDJv8D4pm2wh+7f0pzwalnP5TzHK+pwfDOVYMcfVh2GXZVfqLs3dulvFbUiakma yltmxVEW9O8LQo/Kt6QgpWIXIWWkq1ssgRa5IHVhN0ObyV5hdpye3D4op9chjrX0c7Ls G5vbZaeI9XX4FKhIVKPT1Rqfa9YWx5b9PuhNbKHXOYpaP6p6g9S7a5espFDIKu6ZeQf+ NewQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OPc6kbODFlIcyYEoeSG+YAdIIHdp3uyhG/4PAINTxrk=; b=nRhGNEdHHIFoDVF4l3SKobM9Ofgwwwv/zZBjCVmkOmRtgYB+jsFQ3ZWiEyeoTydjRA S6pmYRmKFHJMzkvNkDzHGmeY8f5Qw6DDDZAZwHIdkJ4uDcSWFs2N6IoFR580e0++zUvi w/er6bCIYrKocyy2AZCSwk8UvwO51w0fxVKzBJyqgqO5XSl7VGmNUtoajDWcJeDaUkq5 /iQX3ws9L3d5aOPSil3l1zYA3bmE8/TjbXcif9Yqrsk//tYctL90TyfJ4upuT2zsNMf/ 6q+TQfKe6mw2HRoVwXSQ0RPpDmsdVN8frisQCy8YCa76WpqhHGNvKmJIkVDZIOV/xNt5 ATsg== X-Gm-Message-State: APjAAAUrOCKKjDKBz3jhX4rMx3Dl8wIkZeXMocE89dafLANvPzisOX7V qB6R07zrFDn4b0TD5uAMNIKCXw== X-Received: by 2002:aa7:8102:: with SMTP id b2mr36326194pfi.105.1559970295911; Fri, 07 Jun 2019 22:04:55 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id b8sm4522482pff.20.2019.06.07.22.04.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jun 2019 22:04:55 -0700 (PDT) From: Bjorn Andersson To: Rob Herring , Mark Rutland , Alim Akhtar , Avri Altman , Pedro Sousa , "James E.J. Bottomley" , "Martin K. Petersen" Cc: Andy Gross , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH v3 2/3] scsi: ufs-qcom: Implement device_reset vops Date: Fri, 7 Jun 2019 22:04:49 -0700 Message-Id: <20190608050450.12056-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190608050450.12056-1-bjorn.andersson@linaro.org> References: <20190608050450.12056-1-bjorn.andersson@linaro.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The UFS_RESET pin on Qualcomm SoCs are controlled by TLMM and exposed through the GPIO framework. Acquire the device-reset GPIO and use this to implement the device_reset vops, to allow resetting the attached memory. Based on downstream support implemented by Subhash Jadavani . Signed-off-by: Bjorn Andersson --- Changes since v2: - Moved implementation to Qualcomm driver .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 2 ++ drivers/scsi/ufs/ufs-qcom.c | 32 +++++++++++++++++++ drivers/scsi/ufs/ufs-qcom.h | 4 +++ 3 files changed, 38 insertions(+) -- 2.18.0 diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt index a74720486ee2..d562d8b4919c 100644 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt @@ -54,6 +54,8 @@ Optional properties: PHY reset from the UFS controller. - resets : reset node register - reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP. +- device-reset-gpios : A phandle and gpio specifier denoting the GPIO connected + to the RESET pin of the UFS memory device. Note: If above properties are not defined it can be assumed that the supply regulators or clocks are always on. diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c index ea7219407309..efaf57ba618a 100644 --- a/drivers/scsi/ufs/ufs-qcom.c +++ b/drivers/scsi/ufs/ufs-qcom.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include "ufshcd.h" @@ -1141,6 +1142,15 @@ static int ufs_qcom_init(struct ufs_hba *hba) goto out_variant_clear; } + host->device_reset = devm_gpiod_get_optional(dev, "device-reset", + GPIOD_OUT_HIGH); + if (IS_ERR(host->device_reset)) { + err = PTR_ERR(host->device_reset); + if (err != -EPROBE_DEFER) + dev_err(dev, "failed to acquire reset gpio: %d\n", err); + goto out_variant_clear; + } + err = ufs_qcom_bus_register(host); if (err) goto out_variant_clear; @@ -1546,6 +1556,27 @@ static void ufs_qcom_dump_dbg_regs(struct ufs_hba *hba) usleep_range(1000, 1100); } +/** + * ufs_qcom_device_reset() - toggle the (optional) device reset line + * @hba: per-adapter instance + * + * Toggles the (optional) reset line to reset the attached device. + */ +static void ufs_qcom_device_reset(struct ufs_hba *hba) +{ + struct ufs_qcom_host *host = ufshcd_get_variant(hba); + + /* + * The UFS device shall detect reset pulses of 1us, sleep for 10us to + * be on the safe side. + */ + gpiod_set_value_cansleep(host->device_reset, 1); + usleep_range(10, 15); + + gpiod_set_value_cansleep(host->device_reset, 0); + usleep_range(10, 15); +} + /** * struct ufs_hba_qcom_vops - UFS QCOM specific variant operations * @@ -1566,6 +1597,7 @@ static struct ufs_hba_variant_ops ufs_hba_qcom_vops = { .suspend = ufs_qcom_suspend, .resume = ufs_qcom_resume, .dbg_register_dump = ufs_qcom_dump_dbg_regs, + .device_reset = ufs_qcom_device_reset, }; /** diff --git a/drivers/scsi/ufs/ufs-qcom.h b/drivers/scsi/ufs/ufs-qcom.h index 68a880185752..b96ffb6804e4 100644 --- a/drivers/scsi/ufs/ufs-qcom.h +++ b/drivers/scsi/ufs/ufs-qcom.h @@ -204,6 +204,8 @@ struct ufs_qcom_testbus { u8 select_minor; }; +struct gpio_desc; + struct ufs_qcom_host { /* * Set this capability if host controller supports the QUniPro mode @@ -241,6 +243,8 @@ struct ufs_qcom_host { struct ufs_qcom_testbus testbus; struct reset_controller_dev rcdev; + + struct gpio_desc *device_reset; }; static inline u32