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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id fn4-20020a1709069d0400b0084d4b907ff8sm13434169ejc.120.2023.01.19.06.43.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Jan 2023 06:43:28 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, "James E.J. Bottomley" , "Martin K. Petersen" , linux-scsi@vger.kernel.org, Brian Masney Subject: [PATCH 1/2] scsi: ufs: ufs-qcom: add basic interconnect support Date: Thu, 19 Jan 2023 16:43:25 +0200 Message-Id: <20230119144326.2492847-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230119144326.2492847-1-dmitry.baryshkov@linaro.org> References: <20230119144326.2492847-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org From: Brian Masney The firmware on the Qualcomm platforms expects the interconnect votes to be present. Let's add very basic support where the maximum throughput is requested to match what's done in a few other drivers. This will not break boot on systems where the interconnects and interconnect-names properties are not specified in device tree for UFS since the interconnect framework will silently return. Signed-off-by: Brian Masney Signed-off-by: Dmitry Baryshkov --- drivers/ufs/host/ufs-qcom.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 8ad1415e10b6..8267a4056120 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include "ufshcd-pltfrm.h" @@ -936,6 +937,23 @@ static const struct reset_control_ops ufs_qcom_reset_ops = { .deassert = ufs_qcom_reset_deassert, }; +static int ufs_qcom_icc_init(struct device *dev, char *pathname, + u32 avg_bw, u32 peak_bw) +{ + struct icc_path *path; + int ret; + + path = devm_of_icc_get(dev, pathname); + if (IS_ERR(path)) + return dev_err_probe(dev, PTR_ERR(path), "failed to acquire interconnect path\n"); + + ret = icc_set_bw(path, avg_bw, peak_bw); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to set bandwidth request\n"); + + return 0; +} + /** * ufs_qcom_init - bind phy with controller * @hba: host controller instance @@ -1005,6 +1023,14 @@ static int ufs_qcom_init(struct ufs_hba *hba) ufs_qcom_get_controller_revision(hba, &host->hw_ver.major, &host->hw_ver.minor, &host->hw_ver.step); + err = ufs_qcom_icc_init(dev, "ufs-ddr", 4096000, 0); + if (err) + goto out_variant_clear; + + err = ufs_qcom_icc_init(dev, "cpu-ufs", 1000, 0); + if (err) + goto out_variant_clear; + /* * for newer controllers, device reference clock control bit has * moved inside UFS controller register address space itself.