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Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1469; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=iD4ooa7gvFH4iiY2/KlUwjcOqPjF6mqUsxynf2nxGNs=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBly1DrJy1H3oYWSSDAMZFzwBPQ1VH6fqx8zhgAs 7GSHotR9vCJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZctQ6wAKCRCLPIo+Aiko 1d7bCACCfJ4zpXitap/cJOFAu7Js4O9gVA7De66YByXSIF7ebZvVbXEt3BP7iGCh/KvYgWyLC6O HXOsnDJUUncZ060nYQJGFcDFij2S2EzAcLuzWGQGKfzgcdzUecBgb61K4YgW8j9V2F6i1zeGlkc rOr1PNTp8/b4xZgEfXBVlerQUxfnGMuExDgET6ZDTtmoukg/RQiGOzjkRGlgMQIX0imAiILLc7f ZV0c0qdp3wzbo2uIKWfbKScrQNrfQR9jBCtp6T/ITe+jwLpYJqnXmV/OKM7oKlrbVSJnxgglvdU 8CabrLISpv4ZE1Kj/5hatjpdKXuR7lxw5Uuu4fmg+H8fm237 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is no need to mention and/or to touch in any way the intermediate (source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow the example lead by all other platforms. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index ce94e2af6bc5..f18d80a97bbf 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2047,24 +2047,20 @@ ufshc: ufshc@624000 { power-domains = <&gcc UFS_GDSC>; clock-names = - "core_clk_src", "core_clk", "bus_clk", "bus_aggr_clk", "iface_clk", - "core_clk_unipro_src", "core_clk_unipro", "core_clk_ice", "ref_clk", "tx_lane0_sync_clk", "rx_lane0_sync_clk"; clocks = - <&gcc UFS_AXI_CLK_SRC>, <&gcc GCC_UFS_AXI_CLK>, <&gcc GCC_SYS_NOC_UFS_AXI_CLK>, <&gcc GCC_AGGRE2_UFS_AXI_CLK>, <&gcc GCC_UFS_AHB_CLK>, - <&gcc UFS_ICE_CORE_CLK_SRC>, <&gcc GCC_UFS_UNIPRO_CORE_CLK>, <&gcc GCC_UFS_ICE_CORE_CLK>, <&rpmcc RPM_SMD_LN_BB_CLK>, @@ -2072,8 +2068,6 @@ ufshc: ufshc@624000 { <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; freq-table-hz = <100000000 200000000>, - <100000000 200000000>, - <0 0>, <0 0>, <0 0>, <0 0>,