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[0/3] MediaTek 8250 UART: fixes and improvements

Message ID 20220427132328.228297-1-angelogioacchino.delregno@collabora.com
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Series MediaTek 8250 UART: fixes and improvements | expand

Message

AngeloGioacchino Del Regno April 27, 2022, 1:23 p.m. UTC 
Even though the UART IP on MTK platforms is 16550A compatible, some
registers are not at a "standard" offset. In order to allow full
functionality of the flow control features and to make Linux able
to fully and properly reconfigure the UART IP, eventually allowing
communication at high speed after a full IP reset, some register
offset fixes have been done.
While at it, even though this bit is always set, also paranoidly
make sure that the "new register map" feature is enabled, as that's
done with just one writel() at probe time, introducing no overhead.

This has been tested on multiple Chromebooks featuring different
SoCs, and a MT6795 Xperia M5 smartphone.

AngeloGioacchino Del Regno (3):
  serial: 8250_mtk: Fix UART_EFR register address
  serial: 8250_mtk: Make sure to select the right FEATURE_SEL
  serial: 8250_mtk: Fix register address for XON/XOFF character

 drivers/tty/serial/8250/8250_mtk.c | 29 ++++++++++++++++++++---------
 1 file changed, 20 insertions(+), 9 deletions(-)